soc/amd/exit_car.S: Drop redundant enabling cache

This is already done in arch/x86/exit_car.S

Change-Id: Ie954aa11d5e76aaa3e2185ba552aafe8d075feb6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37179
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Arthur Heymans 2019-11-24 19:05:47 +01:00 committed by Patrick Georgi
parent 8d82109c08
commit 2ed6848ea3
1 changed files with 0 additions and 5 deletions

View File

@ -29,9 +29,4 @@ chipset_teardown_car:
AMD_DISABLE_STACK
/* enable cache */
movl %cr0, %eax
andl $(~(CR0_CD | CR0_NW)), %eax
movl %eax, %cr0
jmp *%esp