From 2ef39274a3b94dcbdcd9ad15b96b5128d636c32e Mon Sep 17 00:00:00 2001
From: Peter Lemenkov <lemenkov@gmail.com>
Date: Mon, 22 Oct 2007 20:36:16 +0000
Subject: [PATCH] Flashrom: Add more Vendor IDs and ensure correct sorting in
 flash.h.

Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 util/flashrom/flash.h | 72 +++++++++++++++++++++++++++----------------
 1 file changed, 45 insertions(+), 27 deletions(-)

diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index 9d8874282a..220e6c05d3 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -59,10 +59,14 @@ extern struct flashchip flashchips[];
  * All SPI parts have 16-bit device IDs.
  */
 
+#define ALLIANCE_ID		0x52	/* Alliance */
+
 #define AMD_ID			0x01	/* AMD */
 #define AM_29F040B		0xA4
 #define AM_29F016D		0xAD
 
+#define AMIC_ID			0x37	/* AMIC */
+
 #define ASD_ID			0x25	/* ASD */
 #define ASD_AE49F2008		0x52
 
@@ -70,7 +74,12 @@ extern struct flashchip flashchips[];
 #define AT_29C040A		0xA4
 #define AT_29C020		0xDA
 
-#define EON_ID			0x1C
+#define CATALYST_ID		0x31	/* Catalyst */
+
+#define EMST_ID			0x8C	/* EMST / EFST */
+#define EMST_F49B002UA		0x00
+
+#define EON_ID			0x1C	/* EON */
 /* EN25 chips are SPI, first byte of device id is memory type,
  * second byte of device id is log(bitsize)-9. */
 #define EN_25B05		0x2010	/* 2^19 kbit or 2^16 kByte */
@@ -81,6 +90,21 @@ extern struct flashchip flashchips[];
 #define EN_25B16		0x2015
 #define EN_25B32		0x2016
 
+#define FUJITSU_ID		0x04	/* Fujitsu */
+
+#define HYUNDAI_ID		0xAD	/* Hyundai */
+
+#define IMT_ID			0x7F	/* IMT */
+
+#define INTEL_ID		0x89	/* Intel */
+
+#define ISSI_ID			0xD5	/* ISSI */
+
+#define MSYSTEMS_ID		0x156F	/* M-Systems */
+#define MSYSTEMS_MD2200		0xDB	/* ? */
+#define MSYSTEMS_MD2800		0x30	/* hmm -- both 0x30 */
+#define MSYSTEMS_MD2802		0x30	/* hmm -- both 0x30 */
+
 #define MX_ID			0xC2	/* Macronix (MX) */
 /* MX25 chips are SPI, first byte of device id is memory type,
  * second byte of device id is log(bitsize)-9. */
@@ -96,6 +120,10 @@ extern struct flashchip flashchips[];
 #define MX_25L3235D		0x2416
 #define MX_29F002		0xB0
 
+#define PMC_ID			0x9D	/* PMC */
+#define PMC_49FL002		0x6D
+#define PMC_49FL004		0x6E
+
 #define SHARP_ID		0xB0	/* Sharp */
 #define SHARP_LHF00L04		0xCF
 
@@ -129,23 +157,6 @@ extern struct flashchip flashchips[];
 #define SST_49LF016C		0x5C
 #define SST_49LF160C		0x4C
 
-#define PMC_ID			0x9D	/* PMC */
-#define PMC_49FL002		0x6D
-#define PMC_49FL004		0x6E
-
-#define WINBOND_ID		0xDA	/* Winbond */
-#define W_29C011		0xC1
-#define W_29C020C		0x45
-#define W_29C040P		0x46
-#define W_29EE011		0xC1
-#define W_39V040FA		0x34
-#define W_39V040A		0x3D
-#define W_39V040B		0x54
-#define W_39V080A		0xD0
-#define W_49F002U		0x0B
-#define W_49V002A		0xB0
-#define W_49V002FA		0x32
-
 #define ST_ID			0x20	/* ST */
 #define ST_M50FLW040A		0x08
 #define ST_M50FLW040B		0x28
@@ -162,20 +173,27 @@ extern struct flashchip flashchips[];
 #define ST_M29W010B		0x23
 #define ST_M29W040B		0xE3
 
-#define EMST_ID			0x8c	/* EMST / EFST */
-#define EMST_F49B002UA		0x00
-
-#define MSYSTEMS_ID		0x156f	/* M-Systems */
-#define MSYSTEMS_MD2200		0xdb	/* ? */
-#define MSYSTEMS_MD2800		0x30	/* hmm -- both 0x30 */
-#define MSYSTEMS_MD2802		0x30	/* hmm -- both 0x30 */
-
-#define SYNCMOS_ID		0x40	/* SyncMOS */
+#define SYNCMOS_ID		0x40	/* SyncMOS and Mosel Vitelic */
 #define S29C51001T		0x01
 #define S29C51002T		0x02
 #define S29C51004T		0x03
 #define S29C31004T		0x63
 
+#define TI_ID			0x97	/* Texas Instruments */
+
+#define WINBOND_ID		0xDA	/* Winbond */
+#define W_29C011		0xC1
+#define W_29C020C		0x45
+#define W_29C040P		0x46
+#define W_29EE011		0xC1
+#define W_39V040FA		0x34
+#define W_39V040A		0x3D
+#define W_39V040B		0x54
+#define W_39V080A		0xD0
+#define W_49F002U		0x0B
+#define W_49V002A		0xB0
+#define W_49V002FA		0x32
+
 /* function prototypes from udelay.h */
 
 void myusec_delay(int time);