mb/lenovo/s230u: Rewrite trigger inversion ACPI code
The GPIO invert registers are already defined in the PCH code, so just use the 8-bit versions of the registers instead of creating a new GPIO field for the single bits. This allows us to get rid of the Field(GPIO...) code that's causing problems with IASL version 20190509. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Iac5dfb71b3a2b5a25c05a403cf5f403c7acecaaf Reviewed-on: https://review.coreboot.org/c/coreboot/+/32753 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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@ -16,15 +16,6 @@
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Scope (_GPE)
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{
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Field(GPIO, ByteAcc, NoLock, Preserve)
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{
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Offset(0x2c), // GPIO Invert
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, 2,
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GV02, 1,
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, 1,
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GV04, 1,
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}
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Name (PDET, Zero)
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Method (PNOT, 2, Serialized) {
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ShiftLeft (Arg0, Arg1, Local0)
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@ -39,10 +30,20 @@ Scope (_GPE)
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}
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}
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Method (TINV, 2, Serialized) {
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ShiftLeft (One, Arg1, Local0)
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If (LEqual (Arg0, Zero)) {
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Not (Local0, Local0)
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And (GIV0, Local0, GIV0)
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} Else {
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Or (GIV0, Local0, GIV0)
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}
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}
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/* Palm detect sensor 1 */
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Method (_L12, 0, NotSerialized) {
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// Invert trigger
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Store(GP02, GV02)
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TINV (GP02, 2)
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PNOT (GP02, 0)
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}
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@ -50,7 +51,7 @@ Scope (_GPE)
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/* Palm detect sensor 2 */
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Method (_L14, 0, NotSerialized) {
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// Invert trigger
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Store(GP04, GV04)
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TINV (GP04, 4)
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PNOT (GP04, 1)
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}
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