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mainboard/google/coral: Add USB2 phy setting override for Astronaut 

In order to pass type C USB2 eye diagram for sku Astronaut,
USB2 port#1 PHY register needs to be overridden.

sku ID:0,1 Astronaut (USB)
port#1:
PERPORTPETXISET = 7
PERPORTTXISET = 2

sku ID:61,62 Astronaut (LTE)
port#1:
PERPORTPETXISET = 7
PERPORTTXISET = 5

BUG=b:68120012
BRANCH=master
TEST=emerge-coral coreboot chromeos-bootimage

Change-Id: Icf5c9e5f4dae15630ec4d6ca6648cae78ca910c6
Signed-off-by: Ren Kuo <ren.kuo@quantatw.com>
Reviewed-on: https://review.coreboot.org/22135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
ren kuo 2017-10-23 14:44:31 +08:00 committed by Aaron Durbin
parent bb98b38b93
commit 2f1b7aaa3e
1 changed files with 14 additions and 0 deletions
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14
src/mainboard/google/reef/variants/coral/mainboard.c
View File

@ -21,8 +21,12 @@
#include <soc/intel/common/vbt.h> #include <soc/intel/common/vbt.h>
enum { enum {
SKU_0_ASTRONAUT = 0,
SKU_1_ASTRONAUT = 1,
SKU_2_SANTA = 2, SKU_2_SANTA = 2,
SKU_3_SANTA = 3, SKU_3_SANTA = 3,
SKU_61_ASTRONAUT = 61,
SKU_62_ASTRONAUT = 62,
SKU_160_NASHER = 160, SKU_160_NASHER = 160,
SKU_161_NASHER = 161, SKU_161_NASHER = 161,
SKU_162_NASHER = 162, SKU_162_NASHER = 162,
@ -60,11 +64,21 @@ void mainboard_devtree_update(struct device *dev)
sku_id = variant_board_sku(); sku_id = variant_board_sku();
switch (sku_id) { switch (sku_id) {
case SKU_0_ASTRONAUT:
case SKU_1_ASTRONAUT:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[1].Usb20PerPortTxiSet = 2;
break;
case SKU_2_SANTA: case SKU_2_SANTA:
case SKU_3_SANTA: case SKU_3_SANTA:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7; cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[1].Usb20PerPortTxiSet = 2; cfg->usb2eye[1].Usb20PerPortTxiSet = 2;
break; break;
case SKU_61_ASTRONAUT:
case SKU_62_ASTRONAUT:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[1].Usb20PerPortTxiSet = 5;
break;
default: default:
break; break;
} }