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sb/intel/i82801dx: Fix 16-bit read/write PCI_COMMAND register 

Change-Id: Ie27054ded47b91a27036b5b4a21ab69b387239dc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Elyes HAOUAS 2020-04-28 19:59:30 +02:00 committed by Patrick Georgi
parent 5ac723e5a4
commit 2f2191a3d0
3 changed files with 6 additions and 12 deletions
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8
src/southbridge/intel/i82801dx/smihandler.c
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@ -226,7 +226,7 @@ static void busmaster_disable_on_bus(int bus)
for (slot = 0; slot < 0x20; slot++) { for (slot = 0; slot < 0x20; slot++) {
for (func = 0; func < 8; func++) { for (func = 0; func < 8; func++) {
u32 reg32; u16 reg16;
pci_devfn_t dev = PCI_DEV(bus, slot, func); pci_devfn_t dev = PCI_DEV(bus, slot, func);
val = pci_read_config32(dev, PCI_VENDOR_ID); val = pci_read_config32(dev, PCI_VENDOR_ID);
@ -236,9 +236,9 @@ static void busmaster_disable_on_bus(int bus)
continue; continue;
/* Disable Bus Mastering for this one device */ /* Disable Bus Mastering for this one device */
reg32 = pci_read_config32(dev, PCI_COMMAND); reg16 = pci_read_config16(dev, PCI_COMMAND);
reg32 &= ~PCI_COMMAND_MASTER; reg16 &= ~PCI_COMMAND_MASTER;
pci_write_config32(dev, PCI_COMMAND, reg32); pci_write_config16(dev, PCI_COMMAND, reg16);
/* If this is a bridge, then follow it. */ /* If this is a bridge, then follow it. */
hdr = pci_read_config8(dev, PCI_HEADER_TYPE); hdr = pci_read_config8(dev, PCI_HEADER_TYPE);

5
src/southbridge/intel/i82801dx/usb.c
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@ -9,11 +9,8 @@
static void usb_init(struct device *dev) static void usb_init(struct device *dev)
{ {
u32 cmd;
printk(BIOS_DEBUG, "USB: Setting up controller.. "); printk(BIOS_DEBUG, "USB: Setting up controller.. ");
cmd = pci_read_config32(dev, PCI_COMMAND); pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
pci_write_config32(dev, PCI_COMMAND,
cmd | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE); PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE);
printk(BIOS_DEBUG, "done.\n"); printk(BIOS_DEBUG, "done.\n");
} }

5
src/southbridge/intel/i82801dx/usb2.c
View File

@ -10,11 +10,8 @@
static void usb2_init(struct device *dev) static void usb2_init(struct device *dev)
{ {
u32 cmd;
printk(BIOS_DEBUG, "USB: Setting up controller.. "); printk(BIOS_DEBUG, "USB: Setting up controller.. ");
cmd = pci_read_config32(dev, PCI_COMMAND); pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
pci_write_config32(dev, PCI_COMMAND,
cmd | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE); PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE);
printk(BIOS_DEBUG, "done.\n"); printk(BIOS_DEBUG, "done.\n");
} }