GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/{sky,apollo}lake: Wait until GPE is clear when reading 

When reading+clearing a GPE for use as an interrupt we need to
re-read the status register and keep setting the clear bit until
it actually reads back clear.  Also add a 1ms timeout in case the
status never clears.

This is needed if a device sends a longer interrupt pulse and it
is still asserted when the "ISR" goes to clear the status.

BUG=chrome-os-partner:59299
TEST=test cr50 TPM with 20us pulse to ensure it can successfully
communicate with the TPM and does not get confused due to seeing
interrupts that it should not.

Change-Id: I384f484a1728038d3a355586146deee089b22dd9
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17212
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Duncan Laurie 2016-11-03 10:33:43 -07:00 committed by Martin Roth
parent ed4fa099d9
commit 2f3736e7ac
2 changed files with 34 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/soc/intel/apollolake/pmutil.c
View File

@ -29,6 +29,7 @@
#include <soc/pm.h>
#include <device/device.h>
#include <device/pci.h>
#include <timer.h>
#include <vboot/vboot_common.h>
#include "chip.h"
@ -306,6 +307,8 @@ int acpi_get_gpe(int gpe)
{
int bank;
uint32_t mask, sts;
struct stopwatch sw;
int rc = 0;
if (gpe < 0 || gpe > GPE0_DW3_31)
return -1;
@ -313,12 +316,20 @@ int acpi_get_gpe(int gpe)
bank = gpe / 32;
mask = 1 << (gpe % 32);
sts = inl(ACPI_PMIO_BASE + GPE0_STS(bank));
if (sts & mask) {
outl(mask, ACPI_PMIO_BASE + GPE0_STS(bank));
return 1;
}
return 0;
/* Wait up to 1ms for GPE status to clear */
stopwatch_init_msecs_expire(&sw, 1);
do {
if (stopwatch_expired(&sw))
return rc;
sts = inl(ACPI_PMIO_BASE + GPE0_STS(bank));
if (sts & mask) {
outl(mask, ACPI_PMIO_BASE + GPE0_STS(bank));
rc = 1;
}
} while (sts & mask);
return rc;
}
void clear_pmc_status(void)

23
src/soc/intel/skylake/pmutil.c
View File

@ -37,6 +37,7 @@
#include <soc/pm.h>
#include <soc/pmc.h>
#include <soc/smbus.h>
#include <timer.h>
#include "chip.h"
/* Print status bits with descriptive names */
@ -361,6 +362,8 @@ int acpi_get_gpe(int gpe)
{
int bank;
uint32_t mask, sts;
struct stopwatch sw;
int rc = 0;
if (gpe < 0 || gpe > GPE0_WADT)
return -1;
@ -368,12 +371,20 @@ int acpi_get_gpe(int gpe)
bank = gpe / 32;
mask = 1 << (gpe % 32);
sts = inl(ACPI_BASE_ADDRESS + GPE0_STS(bank));
if (sts & mask) {
outl(mask, ACPI_BASE_ADDRESS + GPE0_STS(bank));
return 1;
}
return 0;
/* Wait up to 1ms for GPE status to clear */
stopwatch_init_msecs_expire(&sw, 1);
do {
if (stopwatch_expired(&sw))
return rc;
sts = inl(ACPI_BASE_ADDRESS + GPE0_STS(bank));
if (sts & mask) {
outl(mask, ACPI_BASE_ADDRESS + GPE0_STS(bank));
rc = 1;
}
} while (sts & mask);
return rc;
}
/* Enable all requested GPE */