arch/arm: Pass cbmem_top to ramstage via calling argument
This solution is very generic and can in principle be implemented on all arch/soc. Instead trying to figure out which files can be removed from stages and which cbmem_top implementations need with preprocessor, rename all cbmem_top implementation to cbmem_top_romstage. Mechanisms set in place to pass on information from rom- to ram-stage will be placed in a followup commit. Change-Id: If31f0f1de17ffc92c9397f32b26db25aff4b7cab Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36145 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -17,6 +17,7 @@ config ARCH_ROMSTAGE_ARM
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config ARCH_RAMSTAGE_ARM
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bool
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select ARCH_ARM
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select RAMSTAGE_CBMEM_TOP_ARG
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source src/arch/arm/armv4/Kconfig
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source src/arch/arm/armv7/Kconfig
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@ -14,8 +14,9 @@
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#ifndef __ARCH_STAGES_H
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#define __ARCH_STAGES_H
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#include <stdint.h>
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#include <main_decl.h>
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void stage_entry(void);
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void stage_entry(uintptr_t stage_arg);
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#endif
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@ -22,13 +22,16 @@
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* .text.stage_entry section created by -ffunction-sections).
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*/
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#include <cbmem.h>
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#include <arch/stages.h>
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#include <arch/cache.h>
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/**
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* generic stage entry point. override this if board specific code is needed.
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*/
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__weak void stage_entry(void)
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__weak void stage_entry(uintptr_t stage_arg)
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{
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if (!ENV_ROMSTAGE_OR_BEFORE)
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_cbmem_top_ptr = stage_arg;
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main();
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}
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@ -10,7 +10,6 @@ romstage-y += cbmem.c
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ramstage-y += dmtimer.c
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ramstage-y += monotonic_timer.c
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ramstage-y += nand.c
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ramstage-y += cbmem.c
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bootblock-y += uart.c
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romstage-y += uart.c
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@ -15,7 +15,6 @@
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romstage-y += romstage.c
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romstage-y += cbmem.c
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ramstage-y += cbmem.c
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bootblock-y += media.c
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romstage-y += media.c
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@ -46,7 +46,6 @@ romstage-y += ../tegra/pinmux.c
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romstage-y += cache.c
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romstage-y += uart.c
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ramstage-y += cbmem.c
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ramstage-y += clock.c
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ramstage-y += display.c
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ramstage-y += dma.c
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@ -45,7 +45,7 @@ void verstage_mainboard_init(void)
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early_mainboard_init();
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}
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void stage_entry(void)
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void stage_entry(uintptr_t unused)
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{
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asm volatile ("bl arm_init_caches"
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: : : "r0", "r1", "r2", "r3", "r4", "r5", "ip");
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@ -18,7 +18,6 @@ ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y)
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IDBTOOL = util/rockchip/make_idb.py
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bootblock-y += bootblock.c
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bootblock-y += ../common/cbmem.c
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bootblock-y += ../common/uart.c
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bootblock-y += timer.c
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bootblock-y += clock.c
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@ -55,7 +54,6 @@ romstage-y += tsadc.c
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romstage-y += ../common/i2c.c
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ramstage-y += soc.c
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ramstage-y += ../common/cbmem.c
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ramstage-y += timer.c
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ramstage-y += ../common/i2c.c
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ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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@ -40,7 +40,6 @@ ramstage-y += i2c.c
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ramstage-y += dp-reg.c
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ramstage-y += fb.c
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ramstage-y += usb.c
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ramstage-y += cbmem.c
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CPPFLAGS_common += -Isrc/soc/samsung/exynos5250/include/
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@ -40,7 +40,6 @@ ramstage-y += gpio.c
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ramstage-y += i2c.c
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ramstage-y += dp.c dp_lowlevel.c fimd.c
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ramstage-y += usb.c
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ramstage-y += cbmem.c
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rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c
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