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i82371eb: Roll 82093aa init into isa_init() 

This allows reuse of dev and reg32 already available,
and converting the block from #if to simple if.

Change-Id: I7a56f5a170986bbdf3c0c87eb5ead838ad55c659
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38599
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Keith Hui 2020-01-27 18:00:40 -05:00 committed by Patrick Georgi
parent 2b9004de60
commit 2f3c37bd62
1 changed files with 22 additions and 34 deletions
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56
src/southbridge/intel/i82371eb/isa.c
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@ -30,37 +30,6 @@
#include "i82371eb.h"
#include "chip.h"
#if CONFIG(IOAPIC)
static void enable_intel_82093aa_ioapic(void)
{
u16 reg16;
u32 reg32;
u8 ioapic_id = 2;
volatile u32 *ioapic_index = (volatile u32 *)(IO_APIC_ADDR);
volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10);
struct device *dev;
dev = dev_find_device(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82371AB_ISA, 0);
/* Enable IOAPIC. */
reg16 = pci_read_config16(dev, XBCS);
reg16 |= (1 << 8); /* APIC Chip Select */
pci_write_config16(dev, XBCS, reg16);
/* Set the IOAPIC ID. */
*ioapic_index = 0;
*ioapic_data = ioapic_id << 24;
/* Read back and verify the IOAPIC ID. */
*ioapic_index = 0;
reg32 = (*ioapic_data >> 24) & 0x0f;
printk(BIOS_DEBUG, "IOAPIC ID = %x\n", reg32);
if (reg32 != ioapic_id)
die("IOAPIC error!\n");
}
#endif
static void isa_init(struct device *dev)
{
u32 reg32;
@ -90,7 +59,6 @@ static void isa_init(struct device *dev)
/* Initialize ISA DMA. */
isa_dma_init();
#if CONFIG(IOAPIC)
/*
* Unlike most other southbridges the 82371EB doesn't have a built-in
* IOAPIC. Instead, 82371EB-based boards that support multiple CPUs
@ -99,8 +67,28 @@ static void isa_init(struct device *dev)
* Thus, we can/must only enable the IOAPIC if it actually exists,
* i.e. the respective mainboard does "select IOAPIC".
*/
enable_intel_82093aa_ioapic();
#endif
if (CONFIG(IOAPIC)) {
u16 reg16;
u8 ioapic_id = 2;
volatile u32 *ioapic_index = (volatile u32 *)(IO_APIC_ADDR);
volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10);
/* Enable IOAPIC. */
reg16 = pci_read_config16(dev, XBCS);
reg16 |= (1 << 8); /* APIC Chip Select */
pci_write_config16(dev, XBCS, reg16);
/* Set the IOAPIC ID. */
*ioapic_index = 0;
*ioapic_data = ioapic_id << 24;
/* Read back and verify the IOAPIC ID. */
*ioapic_index = 0;
reg32 = (*ioapic_data >> 24) & 0x0f;
printk(BIOS_DEBUG, "IOAPIC ID = %x\n", reg32);
if (reg32 != ioapic_id)
die("IOAPIC error!\n");
}
}
static void sb_read_resources(struct device *dev)