diff --git a/src/soc/amd/sabrina/acpi/pci_int_defs.asl b/src/soc/amd/sabrina/acpi/pci_int_defs.asl
index e0d1fa2a94..fa5c88b0d6 100644
--- a/src/soc/amd/sabrina/acpi/pci_int_defs.asl
+++ b/src/soc/amd/sabrina/acpi/pci_int_defs.asl
@@ -36,7 +36,9 @@ IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) {
 	PUA0, 0x00000008,	/* Index 0x74: UART0 */
 	PUA1, 0x00000008,	/* Index 0x75: UART1 */
 	PI24, 0x00000008,	/* Index 0x76: I2C4 */
-	PI25, 0x00000008,	/* Index 0x77: I2C5 */
+	PUA4, 0x00000008,	/* Index 0x77: UART4 */
+	PUA2, 0x00000008,	/* Index 0x78: UART2 */
+	PUA3, 0x00000008,	/* Index 0x79: UART3 */
 
 	/* IO-APIC IRQs */
 	Offset (0x80),
@@ -63,5 +65,7 @@ IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) {
 	IUA0, 0x00000008,	/* Index 0xF4: UART0 */
 	IUA1, 0x00000008,	/* Index 0xF5: UART1 */
 	II24, 0x00000008,	/* Index 0xF6: I2C4 */
-	II25, 0x00000008,	/* Index 0xF7: I2C5 */
+	IUA4, 0x00000008,	/* Index 0xF7: UART4 */
+	IUA2, 0x00000008,	/* Index 0xF8: UART2 */
+	IUA3, 0x00000008,	/* Index 0xF9: UART3 */
 }
diff --git a/src/soc/amd/sabrina/fch.c b/src/soc/amd/sabrina/fch.c
index 54404e4256..69149f06e5 100644
--- a/src/soc/amd/sabrina/fch.c
+++ b/src/soc/amd/sabrina/fch.c
@@ -66,7 +66,9 @@ const static struct irq_idx_name irq_association[] = {
 	{ PIRQ_UART0,	"UART0" },
 	{ PIRQ_UART1,	"UART1" },
 	{ PIRQ_I2C4,	"I2C4" },
-	{ PIRQ_I2C5,	"I2C5" },
+	{ PIRQ_UART4,	"UART4" },
+	{ PIRQ_UART2,	"UART2" },
+	{ PIRQ_UART3,	"UART3" },
 };
 
 const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
diff --git a/src/soc/amd/sabrina/include/soc/amd_pci_int_defs.h b/src/soc/amd/sabrina/include/soc/amd_pci_int_defs.h
index 5d28533355..a3f8b82ddc 100644
--- a/src/soc/amd/sabrina/include/soc/amd_pci_int_defs.h
+++ b/src/soc/amd/sabrina/include/soc/amd_pci_int_defs.h
@@ -59,7 +59,8 @@
 #define PIRQ_UART0	0x74	/* UART0 */
 #define PIRQ_UART1	0x75	/* UART1 */
 #define PIRQ_I2C4	0x76	/* I2C4 */
-#define PIRQ_I2C5	0x77	/* I2C5 */
-/* 0x78-0x7f reserved */
+#define PIRQ_UART4	0x77	/* UART4 */
+#define PIRQ_UART2	0x78	/* UART2 */
+#define PIRQ_UART3	0x79	/* UART3 */
 
 #endif /* AMD_SABRINA_AMD_PCI_INT_DEFS_H */