skylake: Add ACPI device name handler
Add a global ACPI device name handler for the Skylake SOC that will translate skylake device paths into an ACPI path that matches the device objects delcared in the DSDT at soc/intel/skylake/acpi/*. The skylake implementation uses a global acpi_name handler for the SOC and it is not necessary to add a function to every device. This function is used by device drivers calling acpi_device_name() and acpi_device_path() to generate ACPI AML in the SSDT. Change-Id: I31cecf7905a51224e7bfc40c6c4ad2487f039097 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14841 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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@ -20,6 +20,7 @@
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#include <device/device.h>
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#include <device/pci.h>
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#include <fsp/util.h>
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#include <soc/acpi.h>
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#include <soc/interrupt.h>
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#include <soc/irq.h>
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#include <soc/pci_devs.h>
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@ -221,6 +222,69 @@ static const SI_PCH_DEVICE_INTERRUPT_CONFIG devintconfig[] = {
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PCI_FUNC(PCH_DEVFN_ISH), int_A, ISH_IRQ)
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};
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#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
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const char *soc_acpi_name(struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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return "PCI0";
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if (dev->path.type != DEVICE_PATH_PCI)
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return NULL;
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switch (dev->path.pci.devfn) {
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case SA_DEVFN_ROOT: return "MCHC";
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case SA_DEVFN_IGD: return "GFX0";
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case PCH_DEVFN_ISH: return "ISHB";
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case PCH_DEVFN_XHCI: return "XHCI";
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case PCH_DEVFN_USBOTG: return "XDCI";
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case PCH_DEVFN_THERMAL: return "THRM";
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case PCH_DEVFN_CIO: return "ICIO";
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case PCH_DEVFN_I2C0: return "I2C0";
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case PCH_DEVFN_I2C1: return "I2C1";
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case PCH_DEVFN_I2C2: return "I2C2";
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case PCH_DEVFN_I2C3: return "I2C3";
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case PCH_DEVFN_ME: return "MEI1";
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case PCH_DEVFN_ME_2: return "MEI2";
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case PCH_DEVFN_ME_IDER: return "MEID";
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case PCH_DEVFN_ME_KT: return "MEKT";
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case PCH_DEVFN_ME_3: return "MEI3";
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case PCH_DEVFN_SATA: return "SATA";
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case PCH_DEVFN_UART2: return "UAR2";
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case PCH_DEVFN_I2C4: return "I2C4";
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case PCH_DEVFN_I2C5: return "I2C5";
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case PCH_DEVFN_PCIE1: return "RP01";
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case PCH_DEVFN_PCIE2: return "RP02";
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case PCH_DEVFN_PCIE3: return "RP03";
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case PCH_DEVFN_PCIE4: return "RP04";
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case PCH_DEVFN_PCIE5: return "RP05";
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case PCH_DEVFN_PCIE6: return "RP06";
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case PCH_DEVFN_PCIE7: return "RP07";
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case PCH_DEVFN_PCIE8: return "RP08";
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case PCH_DEVFN_PCIE9: return "RP09";
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case PCH_DEVFN_PCIE10: return "RP10";
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case PCH_DEVFN_PCIE11: return "RP11";
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case PCH_DEVFN_PCIE12: return "RP12";
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case PCH_DEVFN_UART0: return "UAR0";
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case PCH_DEVFN_UART1: return "UAR1";
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case PCH_DEVFN_GSPI0: return "SPI0";
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case PCH_DEVFN_GSPI1: return "SPI1";
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case PCH_DEVFN_EMMC: return "EMMC";
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case PCH_DEVFN_SDIO: return "SDIO";
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case PCH_DEVFN_SDCARD: return "SDXC";
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case PCH_DEVFN_LPC: return "LPCB";
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case PCH_DEVFN_P2SB: return "P2SB";
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case PCH_DEVFN_PMC: return "PMC_";
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case PCH_DEVFN_HDA: return "HDAS";
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case PCH_DEVFN_SMBUS: return "SBUS";
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case PCH_DEVFN_SPI: return "FSPI";
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case PCH_DEVFN_GBE: return "IGBE";
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case PCH_DEVFN_TRACEHUB:return "THUB";
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}
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return NULL;
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}
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#endif
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static void pci_domain_set_resources(device_t dev)
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{
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assign_resources(dev->link_list);
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@ -231,11 +295,16 @@ static struct device_operations pci_domain_ops = {
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.set_resources = &pci_domain_set_resources,
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.scan_bus = &pci_domain_scan_bus,
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.ops_pci_bus = &pci_bus_default_ops,
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#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
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.acpi_name = &soc_acpi_name,
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#endif
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};
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static struct device_operations cpu_bus_ops = {
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.init = &soc_init_cpus,
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#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
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.acpi_fill_ssdt_generator = generate_cpu_entries,
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#endif
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};
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static void soc_enable(device_t dev)
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@ -24,6 +24,7 @@
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void pch_enable_dev(device_t dev);
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void soc_init_pre_device(void *chip_info);
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void soc_init_cpus(device_t dev);
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const char *soc_acpi_name(struct device *dev);
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extern struct pci_operations soc_pci_ops;
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