mb/google/volteer: Clean up romstage and ramstage UPDs

Move the manual calls to fw_config_probe() into the devicetree; the
AUDIO probe is trivial, and the TCSS devices (DMA0, iTBT RP0 & RP1) are
already guarded with probe statements in the baseboard devicetree, so
the code in romstage.c was redundant. The variants seem to have their
USB4 probe statements correct as well, so the manual UPD setting in
mainboard.c was also unnecessary.

BUG=none
TEST=abuild google/volteer

Change-Id: I1d067ff3d181b152c784634ff99202bb2b9202f7
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48512
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Tim Wawrzynczak 2020-12-09 10:11:06 -07:00
parent 17689367d5
commit 2f917e6cee
3 changed files with 7 additions and 27 deletions

View File

@ -165,20 +165,6 @@ static void mainboard_chip_init(void *chip_info)
}
}
void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
bool has_usb4;
/* If device doesn't have USB4 hardware, disable tbt */
has_usb4 = (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2))
|| fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)));
if (!has_usb4)
memset(params->ITbtPcieRootPortEn, 0,
ARRAY_SIZE(params->ITbtPcieRootPortEn)
* sizeof(*params->ITbtPcieRootPortEn));
}
struct chip_operations mainboard_ops = {
.init = mainboard_chip_init,
.enable_dev = mainboard_enable,

View File

@ -22,17 +22,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
bool half_populated = gpio_get(GPIO_MEM_CH_SEL);
/* Disable HDA device if no audio board is present. */
if (fw_config_probe(FW_CONFIG(AUDIO, NONE)))
mem_cfg->PchHdaEnable = 0;
meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated);
/* Disable TBT if no USB4 hardware */
if (!(fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) ||
fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)))) {
mem_cfg->TcssDma0En = 0;
mem_cfg->TcssItbtPcie0En = 0;
mem_cfg->TcssItbtPcie1En = 0;
}
}

View File

@ -523,6 +523,12 @@ chip soc/intel/tigerlake
device pnp 0c09.0 on end
end
end
device ref hda on end
device ref hda on
probe AUDIO MAX98357_ALC5682I_I2S
probe AUDIO MAX98373_ALC5682I_I2S
probe AUDIO MAX98373_ALC5682_SNDW
probe AUDIO MAX98373_ALC5682I_I2S_UP4
probe AUDIO MAX98360_ALC5682I_I2S
end
end
end