mb/*/*{i82801gx}: Use sb/intel/common/acpi/platform.asl
Change-Id: Ifc0799d26394a525d764fb4ffc096b48060ee22f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36579 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Arthur Heymans
Patrick Georgi
parent
816326576a
commit
2f9a0cdfa6
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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// global NVS and variables
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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Scope (\_SB) {
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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// global NVS and variables
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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Scope (\_SB) {
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -24,7 +24,7 @@ DefinitionBlock(
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0x20090419 // OEM revision
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)
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{
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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#include <cpu/intel/speedstep/acpi/cpu.asl>
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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// global NVS and variables
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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Scope (\_SB) {
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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// global NVS and variables
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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Scope (\_SB) {
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -24,7 +24,7 @@ DefinitionBlock(
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0x20090419 // OEM revision
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)
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{
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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#include <cpu/intel/speedstep/acpi/cpu.asl>
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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// global NVS and variables
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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Scope (\_SB) {
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@ -1,28 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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Method(_PIC, 1)
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{
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/* Remember the OS' IRQ routing choice. */
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Store(Arg0, PICM)
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) /* SMI Function */
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Store (0, TRP0) /* Generate trap */
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Return (SMIF) /* Return value of SMI handler */
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}
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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// global NVS and variables
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#include "acpi/platform.asl"
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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Scope (\_SB) {
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