soc/amd/common/gpio: add PAD_NF_SCI pad type
This patch adds a pin configuration macro that supports both switching a pin to its native function and configuring it as a SCI source. This is a preparation to remove the GPIO2 soc_gpio_hook. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: If0da5c010f35fd902f6b8857368daec93c12394a Reviewed-on: https://review.coreboot.org/c/coreboot/+/50373 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -172,6 +172,11 @@
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* pin the pin to be programmed
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* pull pull up, pull down or no pull
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* event trigger LEVEL_LOW, LEVEL_HIGH
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* PAD_NF_SCI Define native alternate function and confiure SCI source
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* pin the pin to be programmed
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* function the native function
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* pull pull up, pull down or no pull
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* event trigger LEVEL_LOW, LEVEL_HIGH, EDGE_LOW, EDGE_HIGH
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* PAD_WAKE The pin can wake, use after PAD_INT or PAD_SCI
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* pin the pin to be programmed
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* pull pull up, pull down or no pull
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@ -232,6 +237,12 @@
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PAD_PULL(pull) | PAD_TRIGGER(LEVEL_HIGH), \
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PAD_FLAG_EVENT_TRIGGER(trigger) | GPIO_FLAG_SMI)
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/* Native function + SCI pad configuration */
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#define PAD_NF_SCI(pin, func, pull, trigger) \
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PAD_CFG_STRUCT_FLAGS(pin, pin ## _IOMUX_ ## func, \
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PAD_PULL(pull), \
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PAD_FLAG_EVENT_TRIGGER(trigger) | GPIO_FLAG_SCI)
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/* WAKE pad configuration */
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#define PAD_WAKE(pin, pull, trigger, type) \
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PAD_CFG_STRUCT(pin, pin ## _IOMUX_GPIOxx, \
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