amd/cimx/sb800: Fix building with clang
These are all set but unused variable problems. Change-Id: I40aaa1d1cdd90731a23142f1f7a0f67a45915f25 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63046 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -101,8 +101,6 @@ SbReset (
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IN UINT8 OpFlag
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)
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{
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UINT8 Temp;
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Temp = OpFlag;
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RWIO (0xcf9, AccWidthUint8, 0x0, 0x06);
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}
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@ -270,13 +270,11 @@ azaliaInitAfterPciEnum (
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UINT8 dbTempVariable;
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UINT16 dwTempVariable;
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UINT32 ddBAR0;
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UINT32 ddTempVariable;
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dbEnableAzalia = 0;
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dbChannelNum = 0;
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dbTempVariable = 0;
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dwTempVariable = 0;
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ddBAR0 = 0;
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ddTempVariable = 0;
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if ( pConfig->AzaliaController == 1 ) {
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return;
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@ -509,4 +507,3 @@ configureAzaliaSetConfigD4Dword (
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++tempAzaliaCodecEntryPtr;
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}
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}
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@ -88,9 +88,6 @@ AmdSbDispatcher (
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{
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AGESA_STATUS Status;
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UINT64 tdValue;
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tdValue = 0x32314130384253ULL;
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Status = AGESA_UNSUPPORTED;
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saveConfigPointer (pConfig);
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@ -109,8 +109,8 @@ ecInitBeforePciEnum (
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IN AMDSBCFG* pConfig
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)
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{
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AMDSBCFG* pTmp; // dummy code
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pTmp = pConfig;
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/* AMDSBCFG* pTmp; // dummy code */
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/* pTmp = pConfig; */
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}
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/**
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@ -125,7 +125,7 @@ ecInitLatePost (
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IN AMDSBCFG* pConfig
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)
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{
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AMDSBCFG* pTmp; // dummy code
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pTmp = pConfig;
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/* AMDSBCFG* pTmp; // dummy code */
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/* pTmp = pConfig; */
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}
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#endif
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@ -137,9 +137,7 @@ gecInitLatePost (
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IN AMDSBCFG* pConfig
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)
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{
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if ( !pConfig->GecConfig == 0) {
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return; //return if GEC controller is disabled.
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}
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/* if ( !pConfig->GecConfig == 0) { */
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/* return; //return if GEC controller is disabled. */
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/* } */
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}
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@ -330,14 +330,11 @@ commonInitEarlyBoot (
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UINT32 abValue;
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UINT16 dwTempVar;
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CPUID_DATA CpuId;
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UINT8 cimNativepciesupport;
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UINT8 cimIrConfig;
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UINT8 Data;
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cimNativepciesupport = (UINT8) pConfig->NativePcieSupport;
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cimIrConfig = (UINT8) pConfig->IrConfig;
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#if SB_CIMx_PARAMETER == 0
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cimNativepciesupport = cimNativepciesupportDefault;
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cimIrConfig = cimIrConfigDefault;
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#endif
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@ -518,8 +515,6 @@ commonInitEarlyPost (
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UINT8 dbPortStatus;
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UINT8 cimSpreadSpectrum;
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UINT32 cimSpreadSpectrumType;
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AMDSBCFG* pTmp;
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pTmp = pConfig;
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cimSpreadSpectrum = pConfig->SpreadSpectrum;
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cimSpreadSpectrumType = pConfig->BuildParameters.SpreadSpectrumType;
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@ -606,13 +601,11 @@ abLinkInitBeforePciEnum (
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{
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UINT32 cimResetCpuOnSyncFlood;
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ABTBLENTRY *pAbTblPtr;
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AMDSBCFG* Temp;
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cimResetCpuOnSyncFlood = pConfig->ResetCpuOnSyncFlood;
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#if SB_CIMx_PARAMETER == 0
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cimResetCpuOnSyncFlood = cimResetCpuOnSyncFloodDefault;
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#endif
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Temp = pConfig;
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if ( pConfig->SbPcieOrderRule ) {
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pAbTblPtr = (ABTBLENTRY *) FIXUP_PTR (&SbPcieOrderRule[0]);
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abcfgTbl (pAbTblPtr);
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@ -800,9 +793,7 @@ c3PopupSetting (
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IN AMDSBCFG* pConfig
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)
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{
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AMDSBCFG* Temp;
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UINT8 dbValue;
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Temp = pConfig;
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//RPR C-State and VID/FID Change
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dbValue = getNumberOfCpuCores ();
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if (dbValue > 1) {
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@ -218,8 +218,6 @@ sbSmmAcpiOn (
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{
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// Commented the following code since we need to leave the IRQ1/12 filtering enabled always as per latest
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// recommendation in RPR. This is required to fix the keyboard stuck issue when playing games under Windows
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AMDSBCFG* pTmp; //lx-dummy for /W4 build
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pTmp = pConfig;
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// Disable Power Button SMI
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RWMEM (ACPI_MMIO_BASE + SMI_BASE + SB_SMI_REGB2, AccWidthUint8, ~(BIT4 + BIT5), 0);
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@ -250,5 +248,3 @@ CallBackToOEM (
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return Result;
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}
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@ -141,14 +141,12 @@ sbPowerOnInit (
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UINT8 dbCg2WR;
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UINT8 dbCg1Pll;
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UINT8 cimNbSbGen2;
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UINT8 cimSataMode;
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UINT8 cimSpiFastReadEnable;
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UINT8 cimSpiFastReadSpeed;
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UINT8 cimSioHwmPortEnable;
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UINT8 SataPortNum;
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cimNbSbGen2 = pConfig->NbSbGen2;
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cimSataMode = pConfig->SATAMODE.SataModeReg;
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// Adding Fast Read Function support
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if (pConfig->BuildParameters.SpiFastReadEnable != 0 ) {
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cimSpiFastReadEnable = (UINT8) pConfig->BuildParameters.SpiFastReadEnable;
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@ -63,8 +63,6 @@ sbSmmService (
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IN AMDSBCFG* pConfig
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)
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{
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AMDSBCFG* pTmp; //lx-dummy for /W4 build
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pTmp = pConfig;
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}
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/**
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@ -79,8 +77,3 @@ softwareSMIservice (
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)
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{
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}
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