mb/intel/d510mo: Add CPU, SMI-trap and PIC to DSDT

Change-Id: I80853cadb4762d9bb34926e31d65d248c5683417
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13453
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
This commit is contained in:
Damien Zammit 2016-01-26 13:57:17 +11:00 committed by Martin Roth
parent 7102d005b9
commit 301999f4b8
2 changed files with 32 additions and 1 deletions

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@ -0,0 +1,28 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
Method(_PIC, 1)
{
/* Remember the OS' IRQ routing choice. */
Store(Arg0, PICM)
}
/* SMI I/O Trap */
Method(TRAP, 1, Serialized)
{
Store (Arg0, SMIF) /* SMI Function */
Store (0, TRP0) /* Generate trap */
Return (SMIF) /* Return value of SMI handler */
}

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@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@ -23,8 +23,11 @@ DefinitionBlock(
0x20090419 // OEM revision
)
{
#include "acpi/platform.asl"
#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
#include <cpu/intel/common/acpi/cpu.asl>
Scope (\_SB) {
Device (PCI0)
{