nb/intel/ironlake/acpi/hostbridge.asl: Use ASL 2.0 syntax
This brings Ironlake closer to Sandy Bridge. Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change. Change-Id: Idde75e7295f642f8add34168bffe5851ea02fbc6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43687 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -1,6 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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Name(_HID,EISAID("PNP0A08")) // PCIe
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Name(_HID,EISAID("PNP0A08")) // PCIe
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Name(_CID,EISAID("PNP0A03")) // PCI
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Name(_CID,EISAID("PNP0A03")) // PCI
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@ -92,17 +91,16 @@ Device (MCHC)
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External (\_SB.CP00._PSS)
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External (\_SB.CP00._PSS)
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Method (PSSS, 1, NotSerialized)
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Method (PSSS, 1, NotSerialized)
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{
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{
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Store (One, Local0) /* Start at P1 */
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Local0 = 1 /* Start at P1 */
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Store (SizeOf (\_SB.CP00._PSS), Local1)
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Local1 = SizeOf (\_SB.CP00._PSS)
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While (LLess (Local0, Local1)) {
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While (Local0 < Local1) {
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/* Store _PSS entry Control value to Local2 */
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/* Store _PSS entry Control value to Local2 */
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ShiftRight (DeRefOf (Index (DeRefOf (Index
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Local2 = DeRefOf (Index (DeRefOf (Index (\_SB.CP00._PSS, Local0)), 4)) >> 8
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(\_SB.CP00._PSS, Local0)), 4)), 8, Local2)
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If (Local2 == Arg0) {
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If (LEqual (Local2, Arg0)) {
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Return (Local0 - 1)
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Return (Subtract (Local0, 1))
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}
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}
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Increment (Local0)
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Local0++
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}
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}
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Return (0)
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Return (0)
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@ -114,31 +112,31 @@ Device (MCHC)
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If (Acquire (CTCM, 100)) {
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If (Acquire (CTCM, 100)) {
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Return (0)
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Return (0)
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}
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}
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If (LEqual (CTCD, CTCC)) {
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If (CTCD == CTCC) {
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Release (CTCM)
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Release (CTCM)
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Return (0)
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Return (0)
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}
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}
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Store ("Set TDP Down", Debug)
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Debug = "Set TDP Down"
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/* Set CTC */
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/* Set CTC */
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Store (CTCD, CTCS)
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CTCS = CTCD
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/* Set TAR */
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/* Set TAR */
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Store (TARD, TARS)
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TARS = TARD
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/* Set PPC limit and notify OS */
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/* Set PPC limit and notify OS */
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Store (PSSS (TARD), PPCM)
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PPCM = PSSS (TARD)
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PPCN ()
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PPCN ()
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/* Set PL2 to 1.25 * PL1 */
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/* Set PL2 to 1.25 * PL1 */
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Divide (Multiply (CTDD, 125), 100, , PL2V)
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PL2V = (CTDD * 125) / 100
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/* Set PL1 */
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/* Set PL1 */
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Store (CTDD, PL1V)
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PL1V = CTDD
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/* Store the new TDP Down setting */
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/* Store the new TDP Down setting */
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Store (CTCD, CTCC)
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CTCC = CTCD
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Release (CTCM)
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Release (CTCM)
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Return (1)
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Return (1)
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@ -150,31 +148,31 @@ Device (MCHC)
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If (Acquire (CTCM, 100)) {
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If (Acquire (CTCM, 100)) {
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Return (0)
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Return (0)
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}
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}
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If (LEqual (CTCN, CTCC)) {
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If (CTCN == CTCC) {
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Release (CTCM)
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Release (CTCM)
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Return (0)
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Return (0)
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}
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}
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Store ("Set TDP Nominal", Debug)
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Debug = "Set TDP Nominal"
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/* Set PL1 */
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/* Set PL1 */
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Store (CTDN, PL1V)
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PL1V = CTDN
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/* Set PL2 to 1.25 * PL1 */
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/* Set PL2 to 1.25 * PL1 */
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Divide (Multiply (CTDN, 125), 100, , PL2V)
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PL2V = (CTDN * 125) / 100
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/* Set PPC limit and notify OS */
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/* Set PPC limit and notify OS */
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Store (PSSS (TARN), PPCM)
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PPCM = PSSS (TARN)
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PPCN ()
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PPCN ()
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/* Set TAR */
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/* Set TAR */
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Store (TARN, TARS)
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TARS = TARN
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/* Set CTC */
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/* Set CTC */
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Store (CTCN, CTCS)
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CTCS = CTCN
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/* Store the new TDP Nominal setting */
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/* Store the new TDP Nominal setting */
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Store (CTCN, CTCC)
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CTCC = CTCN
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Release (CTCM)
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Release (CTCM)
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Return (1)
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Return (1)
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@ -305,20 +303,20 @@ Method (_CRS, 0, Serialized)
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// Fix up PCI memory region
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// Fix up PCI memory region
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// Start with Top of Lower Usable DRAM
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// Start with Top of Lower Usable DRAM
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Store (^MCHC.TLUD, Local0)
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Local0 = ^MCHC.TLUD
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ShiftRight (Local0, 4, Local0)
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Local0 >>= 4
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Store (^MCHC.TUUD, Local1)
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Local1 = ^MCHC.TUUD
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// Check if ME base is equal
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// Check if ME base is equal
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If (LEqual (Local0, Local1)) {
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If (Local0 == Local1) {
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// Use Top Of Memory instead
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// Use Top Of Memory instead
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Store (^MCHC.TOM, Local0)
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Local0 = ^MCHC.TOM
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ShiftRight (Local0, 6, Local0)
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Local0 >>= 6
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}
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}
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ShiftLeft (Local0, 20, Local0)
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Local0 <<= 20
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Store (Local0, PMIN)
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PMIN = Local0
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Add(Subtract(PMAX, PMIN), 1, PLEN)
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PLEN = PMAX - PMIN + 1
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Return (MCRS)
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Return (MCRS)
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}
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}
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