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soc/amd: Use ACPI_COMMON_MADT_IOAPIC 

Change IRQ #0 to GSI #2 override to positive edge trigger from
the bus ISA default (positive edge).

Change-Id: I2de941071fca6f7208646a065a271fbf47ac2696
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74354
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2023-04-08 22:59:27 +03:00
parent 1f9e24052a
commit 304f8387fe
7 changed files with 2 additions and 61 deletions
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9
src/soc/amd/cezanne/acpi.c
View File

@ -21,19 +21,10 @@
unsigned long acpi_fill_madt(unsigned long current)
{
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current,
GNB_IO_APIC_ADDR);
/* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, 0, 2,
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
/* SCI IRQ type override */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
current = acpi_fill_madt_irqoverride(current);
return current;

2
src/soc/amd/common/block/acpi/Kconfig
View File

@ -2,7 +2,9 @@ config SOC_AMD_COMMON_BLOCK_ACPI
bool
depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO
select ACPI_AMD_HARDWARE_SLEEP_VALUES
select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_CUSTOM_MADT
help
Select this option to use the AcpiMmio ACPI registers.

10
src/soc/amd/glinda/acpi.c
View File

@ -24,19 +24,9 @@
unsigned long acpi_fill_madt(unsigned long current)
{
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current,
GNB_IO_APIC_ADDR);
/* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, 0, 2,
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
/* SCI IRQ type override */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
current = acpi_fill_madt_irqoverride(current);
return current;

10
src/soc/amd/mendocino/acpi.c
View File

@ -23,19 +23,9 @@
unsigned long acpi_fill_madt(unsigned long current)
{
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current,
GNB_IO_APIC_ADDR);
/* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, 0, 2,
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
/* SCI IRQ type override */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
current = acpi_fill_madt_irqoverride(current);
return current;

10
src/soc/amd/phoenix/acpi.c
View File

@ -24,19 +24,9 @@
unsigned long acpi_fill_madt(unsigned long current)
{
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current,
GNB_IO_APIC_ADDR);
/* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, 0, 2,
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
/* SCI IRQ type override */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
current = acpi_fill_madt_irqoverride(current);
return current;

11
src/soc/amd/picasso/acpi.c
View File

@ -27,20 +27,9 @@
unsigned long acpi_fill_madt(unsigned long current)
{
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current,
GNB_IO_APIC_ADDR);
/* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, 0, 2,
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
/* SCI IRQ type override */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
current = acpi_fill_madt_irqoverride(current);
return current;

11
src/soc/amd/stoneyridge/acpi.c
View File

@ -26,19 +26,8 @@
unsigned long acpi_fill_madt(unsigned long current)
{
/* Write Kern IOAPIC, only one */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC2_ADDR);
/* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, 0, 2,
MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
/* SCI IRQ type override */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
return current;
}