soc/intel/denverton_ns: Initialize thermal configuration
Change-Id: I7e1b924154256f8f82ded3d0fa155b3e836d9375 Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/25439 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -53,6 +53,21 @@ static void dnv_configure_mca(void)
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write_cr4(read_cr4() | CR4_MCE);
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write_cr4(read_cr4() | CR4_MCE);
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}
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}
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static void configure_thermal_core(void)
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{
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msr_t msr;
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/* Disable Thermal interrupts */
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msr.lo = 0;
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msr.hi = 0;
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wrmsr(IA32_THERM_INTERRUPT, msr);
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wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr);
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msr = rdmsr(IA32_MISC_ENABLE);
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msr.lo |= THERMAL_MONITOR_ENABLE_BIT; /* TM1/TM2/EMTTM enable */
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wrmsr(IA32_MISC_ENABLE, msr);
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}
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static void denverton_core_init(struct device *cpu)
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static void denverton_core_init(struct device *cpu)
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{
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{
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msr_t msr;
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msr_t msr;
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@ -62,6 +77,9 @@ static void denverton_core_init(struct device *cpu)
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/* Clear out pending MCEs */
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/* Clear out pending MCEs */
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dnv_configure_mca();
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dnv_configure_mca();
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/* Configure Thermal Sensors */
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configure_thermal_core();
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/* Enable Fast Strings */
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/* Enable Fast Strings */
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msr = rdmsr(IA32_MISC_ENABLE);
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msr = rdmsr(IA32_MISC_ENABLE);
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msr.lo |= FAST_STRINGS_ENABLE_BIT;
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msr.lo |= FAST_STRINGS_ENABLE_BIT;
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@ -22,6 +22,8 @@
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#define MSR_FLEX_RATIO 0x194
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#define MSR_FLEX_RATIO 0x194
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#define FLEX_RATIO_LOCK (1 << 20)
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#define FLEX_RATIO_LOCK (1 << 20)
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#define FLEX_RATIO_EN (1 << 16)
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#define FLEX_RATIO_EN (1 << 16)
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/* IA32_MISC_ENABLE 0x1a0 */
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#define THERMAL_MONITOR_ENABLE_BIT (1 << 3)
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#define MSR_MISC_PWR_MGMT 0x1aa
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#define MSR_MISC_PWR_MGMT 0x1aa
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#define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0)
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#define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0)
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#define MSR_TURBO_RATIO_LIMIT 0x1ad
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#define MSR_TURBO_RATIO_LIMIT 0x1ad
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