mb/google/kahlee/variants/liara: Update H1/TP/TS i2c timings

After adjustment on Liara EVT
H1: 392.03 KHz
TP: 397.87 KHz
TS: 397.71 KHz

BUG=b:116309237
BRANCH=master
TEST=emerge-grunt coreboot chromeos-bootimage
     measure by scope

Change-Id: Ib5d7ce09ac58f33ee826d7541e1a0d14a03add9a
Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/28960
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Chris Zhou 2018-10-08 11:36:48 +08:00 committed by Martin Roth
parent 56dceb2e1a
commit 3087bf5283
1 changed files with 6 additions and 6 deletions

View File

@ -32,22 +32,22 @@ chip soc/amd/stoneyridge
register "i2c[1]" = "{
.early_init = 1,
.speed = I2C_SPEED_FAST,
.rise_time_ns = 45,
.fall_time_ns = 4,
.rise_time_ns = 3,
.fall_time_ns = 2,
}"
# Enable I2C2 for trackpad, pen at 400kHz
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,
.rise_time_ns = 48,
.fall_time_ns = 37,
.rise_time_ns = 3,
.fall_time_ns = 2,
}"
# Enable I2C3 for touchscreen at 400kHz
register "i2c[3]" = "{
.speed = I2C_SPEED_FAST,
.rise_time_ns = 82,
.fall_time_ns = 67,
.rise_time_ns = 16,
.fall_time_ns = 8,
}"
device cpu_cluster 0 on