sb/intel/lynxpoint: Move S3 check out of `early_pch_init`
Done for consistency with other platforms. This also drops redundant S3 resume logging, as `southbridge_detect_s3_resume` already prints it. Tested on Asrock B85M Pro4, still boots and still resumes from S3. Change-Id: Id96c5aedad80702ebf343dd0a351fbd4e7b1c6c1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51438 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -5,6 +5,7 @@
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#include <cf9_reset.h>
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#include <cf9_reset.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <device/mmio.h>
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#include <device/mmio.h>
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#include <elog.h>
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#include <timestamp.h>
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#include <timestamp.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/lapic.h>
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#include <cbmem.h>
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#include <cbmem.h>
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@ -16,6 +17,7 @@
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#include <northbridge/intel/haswell/chip.h>
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#include <northbridge/intel/haswell/chip.h>
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#include <northbridge/intel/haswell/haswell.h>
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#include <northbridge/intel/haswell/haswell.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <southbridge/intel/common/pmclib.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/me.h>
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#include <southbridge/intel/lynxpoint/me.h>
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#include <string.h>
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#include <string.h>
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@ -47,8 +49,6 @@ void mainboard_romstage_entry(void)
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const struct northbridge_intel_haswell_config *cfg = config_of_soc();
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const struct northbridge_intel_haswell_config *cfg = config_of_soc();
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int s3resume;
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struct pei_data pei_data = {
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struct pei_data pei_data = {
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.pei_version = PEI_VERSION,
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.pei_version = PEI_VERSION,
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.mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
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.mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
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@ -76,7 +76,11 @@ void mainboard_romstage_entry(void)
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enable_lapic();
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enable_lapic();
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s3resume = early_pch_init();
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early_pch_init();
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const int s3resume = southbridge_detect_s3_resume();
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elog_boot_notify(s3resume);
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/* Perform some early chipset initialization required
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/* Perform some early chipset initialization required
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* before RAM initialization can work
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* before RAM initialization can work
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@ -84,15 +88,6 @@ void mainboard_romstage_entry(void)
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haswell_early_initialization();
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haswell_early_initialization();
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printk(BIOS_DEBUG, "Back from haswell_early_initialization()\n");
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printk(BIOS_DEBUG, "Back from haswell_early_initialization()\n");
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if (s3resume) {
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#if CONFIG(HAVE_ACPI_RESUME)
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printk(BIOS_DEBUG, "Resume from S3 detected.\n");
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#else
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printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n");
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s3resume = 0;
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#endif
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}
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/* Prepare USB controller early in S3 resume */
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/* Prepare USB controller early in S3 resume */
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if (s3resume)
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if (s3resume)
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enable_usb_bar();
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enable_usb_bar();
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@ -6,7 +6,6 @@
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#include <device/pci_def.h>
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#include <device/pci_def.h>
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#include <device/smbus_host.h>
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#include <device/smbus_host.h>
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#include <southbridge/intel/common/pmbase.h>
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#include <southbridge/intel/common/pmbase.h>
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#include <southbridge/intel/common/pmclib.h>
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#include <elog.h>
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#include <elog.h>
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#include "pch.h"
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#include "pch.h"
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#include "chip.h"
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#include "chip.h"
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@ -86,10 +85,8 @@ void __weak mainboard_config_superio(void)
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{
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{
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}
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}
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int early_pch_init(void)
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void early_pch_init(void)
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{
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{
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int wake_from_s3;
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pch_enable_bars();
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pch_enable_bars();
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#if CONFIG(INTEL_LYNXPOINT_LP)
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#if CONFIG(INTEL_LYNXPOINT_LP)
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@ -123,11 +120,4 @@ int early_pch_init(void)
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RCBA32(0x2324) = 0x00854c74;
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RCBA32(0x2324) = 0x00854c74;
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}
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}
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wake_from_s3 = southbridge_detect_s3_resume();
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elog_boot_notify(wake_from_s3);
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/* Report if we are waking from s3. */
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return wake_from_s3;
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}
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}
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@ -121,7 +121,7 @@ void pch_log_state(void);
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void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
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void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
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void enable_usb_bar(void);
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void enable_usb_bar(void);
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int early_pch_init(void);
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void early_pch_init(void);
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void pch_enable_lpc(void);
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void pch_enable_lpc(void);
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void mainboard_config_superio(void);
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void mainboard_config_superio(void);
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void mainboard_config_rcba(void);
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void mainboard_config_rcba(void);
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