diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index 3492bfd6c9..8791a2efc4 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -28,6 +28,7 @@ #include #include #include +#include #if !defined(__PRE_RAM__) #include @@ -95,6 +96,14 @@ void intel_microcode_load_unlocked(const void *microcode_patch) if (current_rev == m->rev) return; +#if ENV_RAMSTAGE + /*SoC specific check to update microcode*/ + if (soc_skip_ucode_update(current_rev, m->rev)) { + printk(BIOS_DEBUG, "Skip microcode update\n"); + return; + } +#endif + msr.lo = (unsigned long)m + sizeof(struct microcode); msr.hi = 0; wrmsr(0x79, msr); @@ -202,3 +211,10 @@ void intel_update_microcode_from_cbfs(void) spin_unlock(µcode_lock); #endif } + +#if ENV_RAMSTAGE +__attribute__((weak)) int soc_skip_ucode_update(u32 currrent_patch_id, u32 new_patch_id) +{ + return 0; +} +#endif diff --git a/src/include/cpu/intel/microcode.h b/src/include/cpu/intel/microcode.h index d2fa1b755f..73b1c424ed 100644 --- a/src/include/cpu/intel/microcode.h +++ b/src/include/cpu/intel/microcode.h @@ -29,6 +29,10 @@ const void *intel_microcode_find(void); * well as ensuring the microcode matches the family and revision (i.e. with * intel_microcode_find()). */ void intel_microcode_load_unlocked(const void *microcode_patch); + +/* SoC specific check to determine if microcode update is really + * required, will skip microcode update if true. */ +int soc_skip_ucode_update(u32 currrent_patch_id, u32 new_patch_id); #endif #endif