From 30f9b953a8ddf3d283e63f9bc1f95605d10a6491 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Tue, 3 Oct 2017 15:54:45 -0600 Subject: [PATCH] soc/amd/stoneyridge: Update AMD firmware placement options - Don't force the selection of placing the firmware outside of cbfs when using vboot. - Set a prompt to allow the option of placing it outside of cbfs. - Leave all Kconfig defaults the same. - Place the AMD firmware directory table in the specified location even when using the 'outside of cbfs" option. - Print where the firmware is being placed when placing it outside of cbfs. BUG=b:65484600 TEST=Assign PSP firmware location, build & test. Firmware shows up inside CBFS. Set 'outside of cbfs' option, verify firmware gets written to the correct location. Change-Id: Ia8258b5c2ecfaaa42d623e3376ec3233115aed58 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/21867 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/Kconfig | 16 ++++++++-------- src/soc/amd/stoneyridge/Makefile.inc | 12 ++++++++++-- 2 files changed, 18 insertions(+), 10 deletions(-) diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 4bf1e571f5..fcf0199d70 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -60,7 +60,6 @@ config CPU_SPECIFIC_OPTIONS select SSE2 config VBOOT - select AMDFW_OUTSIDE_CBFS select VBOOT_SEPARATE_VERSTAGE select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT @@ -253,13 +252,6 @@ config STONEYRIDGE_LEGACY_FREE Select y if there is no keyboard controller in the system. This sets variables in AGESA and ACPI. -config AMDFW_OUTSIDE_CBFS - def_bool n - help - The AMDFW (PSP) is typically locatable in cbfs. Select this - option to manually attach the generated amdfw.rom at an - offset of 0x20000 from the bottom of the coreboot ROM image. - config SERIRQ_CONTINUOUS_MODE bool default n @@ -310,6 +302,14 @@ config USE_PSPSCUREOS If unsure, answer 'y' +config AMDFW_OUTSIDE_CBFS + bool "The AMD firmware is outside CBFS" + default n + help + The AMDFW (PSP) is typically locatable in cbfs. Select this + option to manually attach the generated amdfw.rom outside of + cbfs. The location is selected by the FWM position. + config AMD_FWM_POSITION_INDEX int "Firmware Directory Table location (0 to 5)" range 0 5 diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 2b4d1edd59..d11fac1659 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -248,10 +248,18 @@ ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) PHONY+=add_amdfw INTERMEDIATE+=add_amdfw +# Calculate firmware position inside the ROM +STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \ + $(call int-subtract, $(CONFIG_ROM_SIZE) \ + $(call int-shift-left, \ + 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000) + add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom - printf " DD Adding AMD Firmware\n" + printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \ + "$(STONEYRIDGE_FWM_ROM_POSITION)" dd if=$(obj)/amdfw.rom \ - of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1 + of=$(obj)/coreboot.pre conv=notrunc bs=1 \ + seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1 else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)