AGESA boards: Fix early agesawrapper_amdinitmmio()
Regression introduced with commit
7b23ae0
AGESA: Trace execution with AGESAWRAPPER()
As the call is made before console_init() is called it must
not call any printk(). Debugging Olivehill and Parmer platforms
using a custom FPGA (as these boards have no Super-IO UART) have
been observed to halt and/or delay at early boot.
Change-Id: I3ab4e5378db44aece9046c8636cde1053ce5390d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7059
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
This commit is contained in:
parent
22d824b1dd
commit
30fbb4c23e
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@ -51,7 +51,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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outb(0xD2, 0xcd6);
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outb(0xD2, 0xcd6);
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outb(0x00, 0xcd7);
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outb(0x00, 0xcd7);
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AGESAWRAPPER(amdinitmmio);
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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hudson_lpc_port80();
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hudson_lpc_port80();
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@ -41,7 +41,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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{
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{
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u32 val;
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u32 val;
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volatile int halt = 0;
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volatile int halt = 0;
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AGESA_STATUS status = AGESA_UNSUPPORTED;
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/*
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/*
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* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
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* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
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@ -54,14 +53,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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outb(0xD2, 0xcd6);
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outb(0xD2, 0xcd6);
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outb(0x00, 0xcd7);
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outb(0x00, 0xcd7);
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/*
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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* The following should be a call to AGESAWRAPPER() macro, but
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* that would use console output before it is initialized.
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*/
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status = agesawrapper_amdinitmmio();
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if (AGESA_SUCCESS != status) {
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printk(BIOS_WARNING, "AmdInitMmio reported %s\n", decodeAGESA_STATUS(status));
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}
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hudson_lpc_port80();
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hudson_lpc_port80();
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@ -42,7 +42,8 @@
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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{
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{
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u32 val;
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u32 val;
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AGESAWRAPPER(amdinitmmio);
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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hudson_lpc_port80();
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hudson_lpc_port80();
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@ -47,7 +47,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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u32 val;
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u32 val;
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u8 byte;
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u8 byte;
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device_t dev;
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device_t dev;
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AGESAWRAPPER(amdinitmmio);
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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hudson_lpc_port80();
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hudson_lpc_port80();
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//__asm__ volatile ("1: jmp 1b");
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//__asm__ volatile ("1: jmp 1b");
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@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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u32 val;
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u32 val;
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post_code(0x35);
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post_code(0x35);
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AGESAWRAPPER(amdinitmmio);
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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if (!cpu_init_detectedx && boot_cpu()) {
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if (!cpu_init_detectedx && boot_cpu()) {
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post_code(0x30);
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post_code(0x30);
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@ -56,7 +56,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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//outb(0xD2, 0xcd6);
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//outb(0xD2, 0xcd6);
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//outb(0x00, 0xcd7);
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//outb(0x00, 0xcd7);
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AGESAWRAPPER(amdinitmmio);
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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hudson_lpc_port80();
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hudson_lpc_port80();
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@ -76,7 +76,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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hudson_lpc_port80();
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hudson_lpc_port80();
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#endif
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#endif
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AGESAWRAPPER(amdinitmmio);
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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if (!cpu_init_detectedx && boot_cpu()) {
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if (!cpu_init_detectedx && boot_cpu()) {
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@ -39,7 +39,7 @@
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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{
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{
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u32 val;
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u32 val;
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AGESAWRAPPER(amdinitmmio);
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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hudson_lpc_port80();
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hudson_lpc_port80();
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@ -46,7 +46,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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u32 val;
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u32 val;
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post_code(0x30);
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post_code(0x30);
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agesawrapper_amdinitmmio();
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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post_code(0x31);
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post_code(0x31);
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/* Halt if there was a built in self test failure */
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/* Halt if there was a built in self test failure */
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@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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u32 val;
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u32 val;
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post_code(0x30);
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post_code(0x30);
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agesawrapper_amdinitmmio();
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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post_code(0x31);
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post_code(0x31);
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/* Halt if there was a built in self test failure */
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/* Halt if there was a built in self test failure */
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@ -44,7 +44,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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u32 val;
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u32 val;
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post_code(0x30);
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post_code(0x30);
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agesawrapper_amdinitmmio();
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AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
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post_code(0x31);
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post_code(0x31);
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/* Halt if there was a built in self test failure */
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/* Halt if there was a built in self test failure */
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@ -57,4 +57,6 @@ static inline u32 do_agesawrapper(AGESA_STATUS (*func)(void), const char *name)
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#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func)
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#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func)
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#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func()
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#endif
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#endif
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