AGESA boards: Fix early agesawrapper_amdinitmmio()

Regression introduced with commit

   7b23ae0 AGESA: Trace execution with AGESAWRAPPER()

As the call is made before console_init() is called it must
not call any printk(). Debugging Olivehill and Parmer platforms
using a custom FPGA (as these boards have no Super-IO UART) have
been observed to halt and/or delay at early boot.

Change-Id: I3ab4e5378db44aece9046c8636cde1053ce5390d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7059
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
This commit is contained in:
Kyösti Mälkki 2014-10-20 07:04:55 +03:00
parent 22d824b1dd
commit 30fbb4c23e
12 changed files with 14 additions and 19 deletions

View File

@ -51,7 +51,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
outb(0xD2, 0xcd6); outb(0xD2, 0xcd6);
outb(0x00, 0xcd7); outb(0x00, 0xcd7);
AGESAWRAPPER(amdinitmmio); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80(); hudson_lpc_port80();

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@ -41,7 +41,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{ {
u32 val; u32 val;
volatile int halt = 0; volatile int halt = 0;
AGESA_STATUS status = AGESA_UNSUPPORTED;
/* /*
* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for * In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
@ -54,14 +53,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
outb(0xD2, 0xcd6); outb(0xD2, 0xcd6);
outb(0x00, 0xcd7); outb(0x00, 0xcd7);
/* AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
* The following should be a call to AGESAWRAPPER() macro, but
* that would use console output before it is initialized.
*/
status = agesawrapper_amdinitmmio();
if (AGESA_SUCCESS != status) {
printk(BIOS_WARNING, "AmdInitMmio reported %s\n", decodeAGESA_STATUS(status));
}
hudson_lpc_port80(); hudson_lpc_port80();

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@ -42,7 +42,8 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{ {
u32 val; u32 val;
AGESAWRAPPER(amdinitmmio);
AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80(); hudson_lpc_port80();

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@ -47,7 +47,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val; u32 val;
u8 byte; u8 byte;
device_t dev; device_t dev;
AGESAWRAPPER(amdinitmmio); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80(); hudson_lpc_port80();
//__asm__ volatile ("1: jmp 1b"); //__asm__ volatile ("1: jmp 1b");

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@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val; u32 val;
post_code(0x35); post_code(0x35);
AGESAWRAPPER(amdinitmmio); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
if (!cpu_init_detectedx && boot_cpu()) { if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30); post_code(0x30);

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@ -56,7 +56,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//outb(0xD2, 0xcd6); //outb(0xD2, 0xcd6);
//outb(0x00, 0xcd7); //outb(0x00, 0xcd7);
AGESAWRAPPER(amdinitmmio); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80(); hudson_lpc_port80();

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@ -76,7 +76,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
hudson_lpc_port80(); hudson_lpc_port80();
#endif #endif
AGESAWRAPPER(amdinitmmio); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
if (!cpu_init_detectedx && boot_cpu()) { if (!cpu_init_detectedx && boot_cpu()) {

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@ -39,7 +39,7 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{ {
u32 val; u32 val;
AGESAWRAPPER(amdinitmmio); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80(); hudson_lpc_port80();

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@ -46,7 +46,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val; u32 val;
post_code(0x30); post_code(0x30);
agesawrapper_amdinitmmio(); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
post_code(0x31); post_code(0x31);
/* Halt if there was a built in self test failure */ /* Halt if there was a built in self test failure */

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@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val; u32 val;
post_code(0x30); post_code(0x30);
agesawrapper_amdinitmmio(); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
post_code(0x31); post_code(0x31);
/* Halt if there was a built in self test failure */ /* Halt if there was a built in self test failure */

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@ -44,7 +44,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val; u32 val;
post_code(0x30); post_code(0x30);
agesawrapper_amdinitmmio(); AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
post_code(0x31); post_code(0x31);
/* Halt if there was a built in self test failure */ /* Halt if there was a built in self test failure */

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@ -57,4 +57,6 @@ static inline u32 do_agesawrapper(AGESA_STATUS (*func)(void), const char *name)
#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func) #define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func)
#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func()
#endif #endif