google/snow: Revise romstage initialization code.
Move board setup procedure to snow_setup_* functions, and Snow board-specific (wakeup) code to snow_* for better function names and comments. Verified by successfully building and booting on Google/Snow. Change-Id: I2942d75064135093eeb1c1da188a005fd255111d Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3130 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
This commit is contained in:
Hung-Te Lin
Ronald G. Minnich
parent
526a46ed7e
commit
31039e315c
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@ -36,14 +36,14 @@ enum snow_board_config {
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int board_get_config(void);
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enum {
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BOARD_IS_NOT_WAKEUP, // A normal boot (not suspend/resume).
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BOARD_WAKEUP_DIRECT, // A wake up event that can be resumed any time.
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BOARD_WAKEUP_NEED_CLOCK_RESET, // A wake up event that must be resumed
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SNOW_IS_NOT_WAKEUP, // A normal boot (not suspend/resume).
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SNOW_WAKEUP_DIRECT, // A wake up event that can be resumed any time.
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SNOW_WAKEUP_NEED_CLOCK_RESET, // A wake up event that must be resumed
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// only after clock and memory
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// controllers are re-initialized.
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};
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int board_get_wakeup_state(void);
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void board_wakeup(void);
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int snow_get_wakeup_state(void);
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void snow_wakeup(void);
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#endif /* MAINBOARD_H */
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@ -46,10 +46,16 @@
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#define PMIC_BUS 0
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#define MMC0_GPIO_PIN (58)
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static int setup_pmic(void)
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static void snow_setup_power(void)
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{
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int error = 0;
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power_init();
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/* Initialize I2C bus to configure PMIC. */
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i2c_init(0, CONFIG_SYS_I2C_SPEED, 0x00);
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printk(BIOS_DEBUG, "%s: Setting up PMIC...\n", __func__);
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/*
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* We're using CR1616 coin cell battery that is non-rechargeable
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* battery. But, BBCHOSTEN bit of the BBAT Charger Register in
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@ -81,19 +87,19 @@ static int setup_pmic(void)
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error |= max77686_enable_32khz_cp(PMIC_BUS);
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if (error)
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printk(BIOS_CRIT, "%s: Error during PMIC setup\n", __func__);
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return error;
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if (error) {
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printk(BIOS_CRIT, "%s: PMIC error: %#x\n", __func__, error);
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die("Failed to intialize PMIC.\n");
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}
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}
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static void initialize_s5p_mshc(void)
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static void snow_setup_storage(void)
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{
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/* MMC0: Fixed, 8 bit mode, connected with GPIO. */
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if (clock_set_mshci(PERIPH_ID_SDMMC0))
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printk(BIOS_CRIT, "Failed to set clock for SDMMC0.\n");
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printk(BIOS_CRIT, "%s: Failed to set MMC0 clock.\n", __func__);
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if (gpio_direction_output(MMC0_GPIO_PIN, 1)) {
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printk(BIOS_CRIT, "Unable to power on SDMMC0.\n");
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printk(BIOS_CRIT, "%s: Unable to power on MMC0.\n", __func__);
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}
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gpio_set_pull(MMC0_GPIO_PIN, EXYNOS_GPIO_PULL_NONE);
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gpio_set_drv(MMC0_GPIO_PIN, EXYNOS_GPIO_DRV_4X);
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@ -104,12 +110,12 @@ static void initialize_s5p_mshc(void)
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exynos_pinmux_config(PERIPH_ID_SDMMC2, 0);
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}
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static void graphics(void)
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static void snow_setup_graphics(void)
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{
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exynos_pinmux_config(PERIPH_ID_DPHPD, 0);
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}
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static void chromeos_gpios(void)
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static void snow_setup_gpio(void)
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{
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struct exynos5_gpio_part1 *gpio_pt1;
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struct exynos5_gpio_part2 *gpio_pt2;
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@ -137,53 +143,49 @@ static void chromeos_gpios(void)
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s5p_gpio_set_pull(&gpio_pt2->x1, POWER_GPIO, EXYNOS_GPIO_PULL_NONE);
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}
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static void snow_setup_memory(struct mem_timings *mem, int is_resume)
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{
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printk(BIOS_SPEW, "man: 0x%x type: 0x%x, div: 0x%x, mhz: 0x%x\n",
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mem->mem_manuf,
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mem->mem_type,
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mem->mpll_mdiv,
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mem->frequency_mhz);
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if (ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, !is_resume)) {
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die("Failed to initialize memory controller.\n");
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}
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}
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static struct mem_timings *snow_setup_clock(void)
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{
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struct mem_timings *mem = get_mem_timings();
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struct arm_clk_ratios *arm_ratios = get_arm_clk_ratios();
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if (!mem) {
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die("Unable to auto-detect memory timings\n");
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}
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system_clock_init(mem, arm_ratios);
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return mem;
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}
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void main(void)
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{
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struct mem_timings *mem;
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struct arm_clk_ratios *arm_ratios;
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int ret;
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void *entry;
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clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */
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/* Clock must be initialized before console_init, otherwise you may need
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* to re-initialize serial console drivers again. */
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mem = get_mem_timings();
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arm_ratios = get_arm_clk_ratios();
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system_clock_init(mem, arm_ratios);
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mem = snow_setup_clock();
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console_init();
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snow_setup_power();
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i2c_init(0, CONFIG_SYS_I2C_SPEED, 0x00);
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if (power_init())
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power_shutdown();
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printk(BIOS_DEBUG, "%s: setting up pmic...\n", __func__);
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if (setup_pmic())
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power_shutdown();
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snow_setup_memory(mem, 0);
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if (!mem) {
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printk(BIOS_CRIT, "Unable to auto-detect memory timings\n");
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while(1);
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}
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printk(BIOS_SPEW, "man: 0x%x type: 0x%x, div: 0x%x, mhz: 0x%x\n",
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mem->mem_manuf,
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mem->mem_type,
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mem->mpll_mdiv,
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mem->frequency_mhz);
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ret = ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, 1);
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if (ret) {
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printk(BIOS_ERR, "Memory controller init failed, err: %x\n",
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ret);
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while(1);
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}
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initialize_s5p_mshc();
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chromeos_gpios();
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graphics();
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snow_setup_storage();
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snow_setup_gpio();
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snow_setup_graphics();
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/* Set SPI (primary CBFS media) clock to 50MHz. */
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clock_set_rate(PERIPH_ID_SPI1, 50000000);
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entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
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printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry);
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@ -26,16 +26,16 @@
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#include "mainboard.h"
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static int wakeup_need_reset(void)
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static int snow_wakeup_need_reset(void)
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{
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/* The "wake up" event is not reliable (known as "bad wakeup") and needs
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* reset if GPIO value is high. */
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return gpio_get_value(GPIO_Y10);
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}
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void board_wakeup(void)
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void snow_wakeup(void)
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{
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if (wakeup_need_reset())
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if (snow_wakeup_need_reset())
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power_reset();
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power_init(); /* Ensure ps_hold_setup() for early wakeup. */
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@ -44,7 +44,7 @@ void board_wakeup(void)
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die("Failed to wake up.\n");
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}
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int board_get_wakeup_state()
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int snow_get_wakeup_state()
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{
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uint32_t status = power_read_reset_status();
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@ -53,10 +53,10 @@ int board_get_wakeup_state()
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*/
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if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA)
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return BOARD_WAKEUP_DIRECT;
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return SNOW_WAKEUP_DIRECT;
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if (status == S5P_CHECK_SLEEP)
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return BOARD_WAKEUP_NEED_CLOCK_RESET;
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return SNOW_WAKEUP_NEED_CLOCK_RESET;
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return BOARD_IS_NOT_WAKEUP;
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return SNOW_IS_NOT_WAKEUP;
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}
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