soc/intel/apollolake: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot paths move the rtc failure calculation to pmutil.c and add a helper function to determine if failure occurred. BUG=b:63054105 Change-Id: I1b02028a1830ff9b28b23da7a4a1fd343f329f0d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -14,17 +14,14 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <cbmem.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <device/pci.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ids.h>
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#include <intelblocks/lpc_lib.h>
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#include <intelblocks/lpc_lib.h>
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#include <intelblocks/rtc.h>
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#include <intelblocks/rtc.h>
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#include <pc80/mc146818rtc.h>
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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#include <soc/pcr_ids.h>
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#include <soc/pcr_ids.h>
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#include <soc/pm.h>
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#include <soc/pm.h>
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#include <vboot/vbnv.h>
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#include "chip.h"
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#include "chip.h"
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static const struct lpc_mmio_range apl_lpc_fixed_mmio_ranges[] = {
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static const struct lpc_mmio_range apl_lpc_fixed_mmio_ranges[] = {
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@ -83,18 +80,6 @@ void lpc_configure_pads(void)
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gpio_configure_pads(lpc_gpios, ARRAY_SIZE(lpc_gpios));
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gpio_configure_pads(lpc_gpios, ARRAY_SIZE(lpc_gpios));
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}
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}
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int soc_get_rtc_failed(void)
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{
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const struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE);
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if (!ps) {
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printk(BIOS_ERR, "Could not find power state in cbmem, RTC init aborted\n");
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return 1;
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}
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return !!(ps->gen_pmcon1 & RPS);
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}
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void lpc_init(struct device *dev)
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void lpc_init(struct device *dev)
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{
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{
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const struct soc_intel_apollolake_config *cfg;
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const struct soc_intel_apollolake_config *cfg;
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@ -19,6 +19,7 @@
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#include <arch/acpi.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/io.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/msr.h>
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#include <device/device.h>
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#include <device/device.h>
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@ -26,6 +27,7 @@
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#include <device/pci_def.h>
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#include <device/pci_def.h>
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#include <intelblocks/msr.h>
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#include <intelblocks/msr.h>
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#include <intelblocks/pmclib.h>
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#include <intelblocks/pmclib.h>
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#include <intelblocks/rtc.h>
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#include <rules.h>
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#include <rules.h>
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#include <soc/iomap.h>
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#include <soc/iomap.h>
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#include <soc/cpu.h>
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#include <soc/cpu.h>
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@ -198,3 +200,20 @@ void enable_pm_timer_emulation(void)
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msr.lo = EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + R_ACPI_PM1_TMR);
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msr.lo = EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + R_ACPI_PM1_TMR);
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wrmsr(MSR_EMULATE_PM_TMR, msr);
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wrmsr(MSR_EMULATE_PM_TMR, msr);
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}
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}
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static int rtc_failed(uint32_t gen_pmcon1)
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{
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return !!(gen_pmcon1 & RPS);
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}
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int soc_get_rtc_failed(void)
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{
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const struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE);
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if (!ps) {
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printk(BIOS_ERR, "Could not find power state in cbmem, RTC init aborted\n");
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return 1;
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}
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return rtc_failed(ps->gen_pmcon1);
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}
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