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Kconfig: Prefix hex defaults with 0x 

Because these variables had "non-hexidecimal" defaults, they
were updated by kconfig when writing defconfig files.

Change-Id: Ic1a070d340708f989157ad18ddc79de7bb92d873
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16827
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Martin Roth 2016-09-29 14:46:24 -06:00
parent 48a0129d97
commit 311fb696cf
4 changed files with 5 additions and 5 deletions
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4
src/drivers/intel/fsp1_1/Kconfig
View File

@ -34,13 +34,13 @@ config HAVE_FSP_BIN
config CPU_MICROCODE_CBFS_LEN
hex "Microcode update region length in bytes"
default 0
default 0x0
help
The length in bytes of the microcode update region.
config CPU_MICROCODE_CBFS_LOC
hex "Microcode update base address in CBFS"
default 0
default 0x0
help
The location (base address) in CBFS that contains the microcode update
binary.

2
src/drivers/uart/Kconfig
View File

@ -69,7 +69,7 @@ config UART_USE_REFCLK_AS_INPUT_CLOCK
config UART_PCI_ADDR
hex "UART's PCI bus, device, function address"
default 0
default 0x0
help
Specify zero if the UART is connected to another bus type.
For PCI based UARTs, build the value as:

2
src/mainboard/google/daisy/Kconfig
View File

@ -49,7 +49,7 @@ config DRAM_SIZE_MB
config EC_GOOGLE_CHROMEEC_I2C_BUS
hex
default 4
default 0x4
config UART_FOR_CONSOLE
int

2
src/mainboard/google/smaug/Kconfig
View File

@ -85,7 +85,7 @@ config DRIVER_TPM_I2C_ADDR
config EC_GOOGLE_CHROMEEC_I2C_BUS
hex
default 1
default 0x1
config EC_GOOGLE_CHROMEEC_BOARDNAME
string