Sandybridge: Set PEG clock gating
If the PEI System Agent doesn't run PCIe initialization, the PEG clock gating will not be setup. Add the PEG clock gating when pei_data->pcie_init is 0. Change-Id: I7e31bcebd11feb4807aa29b528adf09fb013c3ce Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/1827 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -205,6 +205,13 @@ static void report_memory_config(void)
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}
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}
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static void post_system_agent_init(struct pei_data *pei_data)
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{
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/* If PCIe init is skipped, set the PEG clock gating */
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if (!pei_data->pcie_init)
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MCHBAR32(0x7010) = MCHBAR32(0x7010) | 0x01;
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}
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/**
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* Find PEI executable in coreboot filesystem and execute it.
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*
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@ -289,6 +296,7 @@ void sdram_initialize(struct pei_data *pei_data)
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else
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intel_early_me_status();
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post_system_agent_init(pei_data);
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report_memory_config();
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/* S3 resume: don't save scrambler seed or MRC data */
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