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cpu/intel/haswell: remove dependency on socket_rpga989 

Remove dependency of Haswell on cpu/intel/socket_rpga989 code,
which is a carry-over from Sandy Bridge/Ivy Bridge and older
coreboot conventions where features were structured around socket types.

Add CPU-specific options to Kconfig and required subdirs to
Makefile.inc which are curently included with socket_rpga989.

TEST=successfully built and booted on google/panther

Change-Id: Ic788e2928df107d11ea2d2eca7613490aaed395c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: http://review.coreboot.org/10037
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Matt DeVillier 2015-04-30 01:19:16 -05:00 committed by Patrick Georgi
parent 40e2004abf
commit 31769d99da
14 changed files with 22 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/cpu/intel/haswell/Kconfig
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@ -12,6 +12,8 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_RAMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32
select BACKUP_DEFAULT_SMM_REGION select BACKUP_DEFAULT_SMM_REGION
select SMP select SMP
select MMX
select SSE
select SSE2 select SSE2
select UDELAY_TSC select UDELAY_TSC
select TSC_CONSTANT_RATE select TSC_CONSTANT_RATE

8
src/cpu/intel/haswell/Makefile.inc
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@ -14,3 +14,11 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
smm-$(CONFIG_MONOTONIC_TIMER_MSR) += monotonic_timer.c smm-$(CONFIG_MONOTONIC_TIMER_MSR) += monotonic_timer.c
cpu_incs += $(src)/cpu/intel/haswell/cache_as_ram.inc cpu_incs += $(src)/cpu/intel/haswell/cache_as_ram.inc
subdirs-y += ../../x86/tsc
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm
subdirs-y += ../microcode
subdirs-y += ../turbo

2
src/mainboard/google/bolt/Kconfig
View File

@ -2,7 +2,7 @@ if BOARD_GOOGLE_BOLT
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select CPU_INTEL_SOCKET_RPGA989 select CPU_INTEL_HASWELL
select NORTHBRIDGE_INTEL_HASWELL select NORTHBRIDGE_INTEL_HASWELL
select SOUTHBRIDGE_INTEL_LYNXPOINT select SOUTHBRIDGE_INTEL_LYNXPOINT
select INTEL_LYNXPOINT_LP select INTEL_LYNXPOINT_LP

4
src/mainboard/google/bolt/devicetree.cb
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@ -22,10 +22,8 @@ chip northbridge/intel/haswell
register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
end
chip cpu/intel/haswell chip cpu/intel/haswell
device lapic 0 on end
# Magic APIC ID to locate this chip # Magic APIC ID to locate this chip
device lapic 0xACAC off end device lapic 0xACAC off end

2
src/mainboard/google/falco/Kconfig
View File

@ -3,7 +3,7 @@ if BOARD_GOOGLE_FALCO
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_RPGA989 select CPU_INTEL_HASWELL
select NORTHBRIDGE_INTEL_HASWELL select NORTHBRIDGE_INTEL_HASWELL
select SOUTHBRIDGE_INTEL_LYNXPOINT select SOUTHBRIDGE_INTEL_LYNXPOINT
select INTEL_LYNXPOINT_LP select INTEL_LYNXPOINT_LP

4
src/mainboard/google/falco/devicetree.cb
View File

@ -22,10 +22,8 @@ chip northbridge/intel/haswell
register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms (T6) register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms (T6)
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
end
chip cpu/intel/haswell chip cpu/intel/haswell
device lapic 0 on end
# Magic APIC ID to locate this chip # Magic APIC ID to locate this chip
device lapic 0xACAC off end device lapic 0xACAC off end

2
src/mainboard/google/panther/Kconfig
View File

@ -2,7 +2,7 @@ if BOARD_GOOGLE_PANTHER
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select CPU_INTEL_SOCKET_RPGA989 select CPU_INTEL_HASWELL
select NORTHBRIDGE_INTEL_HASWELL select NORTHBRIDGE_INTEL_HASWELL
select SOUTHBRIDGE_INTEL_LYNXPOINT select SOUTHBRIDGE_INTEL_LYNXPOINT
select INTEL_LYNXPOINT_LP select INTEL_LYNXPOINT_LP

4
src/mainboard/google/panther/devicetree.cb
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@ -10,10 +10,8 @@ chip northbridge/intel/haswell
register "gpu_dp_b_hotplug" = "0x06" register "gpu_dp_b_hotplug" = "0x06"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
end
chip cpu/intel/haswell chip cpu/intel/haswell
device lapic 0 on end
# Magic APIC ID to locate this chip # Magic APIC ID to locate this chip
device lapic 0xACAC off end device lapic 0xACAC off end

2
src/mainboard/google/peppy/Kconfig
View File

@ -3,7 +3,7 @@ if BOARD_GOOGLE_PEPPY
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_RPGA989 select CPU_INTEL_HASWELL
select NORTHBRIDGE_INTEL_HASWELL select NORTHBRIDGE_INTEL_HASWELL
select SOUTHBRIDGE_INTEL_LYNXPOINT select SOUTHBRIDGE_INTEL_LYNXPOINT
select INTEL_LYNXPOINT_LP select INTEL_LYNXPOINT_LP

4
src/mainboard/google/peppy/devicetree.cb
View File

@ -22,10 +22,8 @@ chip northbridge/intel/haswell
register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
end
chip cpu/intel/haswell chip cpu/intel/haswell
device lapic 0 on end
# Magic APIC ID to locate this chip # Magic APIC ID to locate this chip
device lapic 0xACAC off end device lapic 0xACAC off end

2
src/mainboard/google/slippy/Kconfig
View File

@ -2,7 +2,7 @@ if BOARD_GOOGLE_SLIPPY
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select CPU_INTEL_SOCKET_RPGA989 select CPU_INTEL_HASWELL
select NORTHBRIDGE_INTEL_HASWELL select NORTHBRIDGE_INTEL_HASWELL
select SOUTHBRIDGE_INTEL_LYNXPOINT select SOUTHBRIDGE_INTEL_LYNXPOINT
select INTEL_LYNXPOINT_LP select INTEL_LYNXPOINT_LP

4
src/mainboard/google/slippy/devicetree.cb
View File

@ -22,10 +22,8 @@ chip northbridge/intel/haswell
register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
end
chip cpu/intel/haswell chip cpu/intel/haswell
device lapic 0 on end
# Magic APIC ID to locate this chip # Magic APIC ID to locate this chip
device lapic 0xACAC off end device lapic 0xACAC off end

2
src/mainboard/intel/baskingridge/Kconfig
View File

@ -2,7 +2,7 @@ if BOARD_INTEL_BASKING_RIDGE
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select CPU_INTEL_SOCKET_RPGA989 select CPU_INTEL_HASWELL
select NORTHBRIDGE_INTEL_HASWELL select NORTHBRIDGE_INTEL_HASWELL
select SOUTHBRIDGE_INTEL_LYNXPOINT select SOUTHBRIDGE_INTEL_LYNXPOINT
select BOARD_ROMSIZE_KB_8192 select BOARD_ROMSIZE_KB_8192

4
src/mainboard/intel/baskingridge/devicetree.cb
View File

@ -10,10 +10,8 @@ chip northbridge/intel/haswell
register "gpu_dp_b_hotplug" = "0x06" register "gpu_dp_b_hotplug" = "0x06"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
end
chip cpu/intel/haswell chip cpu/intel/haswell
device lapic 0 on end
# Magic APIC ID to locate this chip # Magic APIC ID to locate this chip
device lapic 0xACAC off end device lapic 0xACAC off end