GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/baytrail/sd.c: Align with Braswell 

This reduces the differences between Bay Trail and Braswell.

Tested with BUILD_TIMELESS=1, Google Ninja remains identical.

Change-Id: I08ccbc70744a17d589450e321a3ed77d9a56492f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43196
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-07-07 17:59:14 +02:00
parent 41b1edf58b
commit 31929bf489
1 changed files with 6 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
src/soc/intel/baytrail/sd.c
View File

@ -12,9 +12,9 @@
#include <soc/ramstage.h>
#include "chip.h"
#define CAP_OVERRIDE_LOW 0xa0
#define CAP_OVERRIDE_HIGH 0xa4
# define USE_CAP_OVERRIDES (1 << 31)
#define CAP_OVERRIDE_LOW 0xa0
#define CAP_OVERRIDE_HIGH 0xa4
#define USE_CAP_OVERRIDES (1 << 31)
static void sd_init(struct device *dev)
{
@ -22,10 +22,9 @@ static void sd_init(struct device *dev)
if (config->sdcard_cap_low != 0 || config->sdcard_cap_high != 0) {
printk(BIOS_DEBUG, "Overriding SD Card controller caps.\n");
pci_write_config32(dev, CAP_OVERRIDE_LOW,
config->sdcard_cap_low);
pci_write_config32(dev, CAP_OVERRIDE_HIGH,
config->sdcard_cap_high | USE_CAP_OVERRIDES);
pci_write_config32(dev, CAP_OVERRIDE_LOW, config->sdcard_cap_low);
pci_write_config32(dev, CAP_OVERRIDE_HIGH, config->sdcard_cap_high |
USE_CAP_OVERRIDES);
}
if (config->scc_acpi_mode)