soc/intel/alderlake: Add GFx Device ID 0x46aa
This CL adds support for new ADL-M graphics Device ID 0x46aa. TEST=boot to OS Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Change-Id: Ib24b494b0eedad447f3b2a3d1d80c9941680c25d Reviewed-on: https://review.coreboot.org/c/coreboot/+/56775 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -3824,6 +3824,7 @@
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#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6
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#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6
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#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
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#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
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#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
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#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
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#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa
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/* Intel Northbridge Ids */
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/* Intel Northbridge Ids */
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#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
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#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
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@ -107,6 +107,7 @@ static struct {
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{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
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{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
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{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
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{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
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{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
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{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
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{ PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" },
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};
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};
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static inline uint8_t get_dev_revision(pci_devfn_t dev)
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static inline uint8_t get_dev_revision(pci_devfn_t dev)
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@ -304,6 +304,7 @@ static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_INTEL_ADL_P_GT2_6,
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PCI_DEVICE_ID_INTEL_ADL_P_GT2_6,
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PCI_DEVICE_ID_INTEL_ADL_S_GT1,
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PCI_DEVICE_ID_INTEL_ADL_S_GT1,
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PCI_DEVICE_ID_INTEL_ADL_M_GT1,
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PCI_DEVICE_ID_INTEL_ADL_M_GT1,
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PCI_DEVICE_ID_INTEL_ADL_M_GT2,
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0,
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0,
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};
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};
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