soc/mediatek: Move DP drivers to common

DP drivers can be shared for both MT8195 and MT8188, so move them to
common folder.

BUG=b:244208960
TEST=emerge-cherry coreboot.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Ic80c03aa6b13e6c9c39fd63b5c1c1cbdbe93a7c4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

src/soc/mediatek/common/dp/include/soc/dp_intf.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#ifndef SOC_MEDIATEK_MT8195_DP_INTF_H
-#define SOC_MEDIATEK_MT8195_DP_INTF_H
+#ifndef SOC_MEDIATEK_COMMON_DP_DP_INTF_H
+#define SOC_MEDIATEK_COMMON_DP_DP_INTF_H
 
 #include <edid.h>
 
@@ -255,4 +255,4 @@ struct mtk_dpintf_yc_limit {
 
 void dp_intf_config(const struct edid *edid);
 
-#endif /* SOC_MEDIATEK_MT8195_DP_INTF_H */
+#endif /* SOC_MEDIATEK_COMMON_DP_DP_INTF_H */

src/soc/mediatek/common/dp/include/soc/dptx.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#ifndef SOC_MEDIATEK_MT8195_DPTX_H
-#define SOC_MEDIATEK_MT8195_DPTX_H
+#ifndef SOC_MEDIATEK_COMMON_DP_DPTX_H
+#define SOC_MEDIATEK_COMMON_DP_DPTX_H
 
 #define DPTX_TBC_BUF_READSTARTADRTHRD	0x08
 #define ENABLE_DPTX_EF_MODE		0x1
@@ -74,4 +74,4 @@ struct mtk_dp {
 
 int mtk_edp_init(struct edid *edid);
 
-#endif /* SOC_MEDIATEK_MT8195_DPTX_H */
+#endif /* SOC_MEDIATEK_COMMON_DP_DPTX_H */

src/soc/mediatek/common/dp/include/soc/dptx_hal.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#ifndef SOC_MEDIATEK_MT8195_DPTX_HAL_H
-#define SOC_MEDIATEK_MT8195_DPTX_HAL_H
+#ifndef SOC_MEDIATEK_COMMON_DP_DPTX_HAL_H
+#define SOC_MEDIATEK_COMMON_DP_DPTX_HAL_H
 
 #define AUX_CMD_I2C_R_MOT0	0x1
 #define AUX_CMD_I2C_R		0x5
@@ -100,4 +100,4 @@ void dptx_hal_set_color_format(struct mtk_dp *mtk_dp, u8 color_format);
 void dptx_hal_set_txrate(struct mtk_dp *mtk_dp, int value);
 void dptx_hal_analog_power_en(struct mtk_dp *mtk_dp, bool enable);
 
-#endif /* SOC_MEDIATEK_MT8195_DPTX_HAL_H */
+#endif /* SOC_MEDIATEK_COMMON_DP_DPTX_HAL_H */

src/soc/mediatek/common/dp/include/soc/dptx_reg.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#ifndef SOC_MEDIATEK_MT8195_DRTX_REG_H
-#define SOC_MEDIATEK_MT8195_DRTX_REG_H
+#ifndef SOC_MEDIATEK_COMMON_DP_DPTX_REG_H
+#define SOC_MEDIATEK_COMMON_DP_DPTX_REG_H
 
 #define TOP_OFFSET	0x2000
 #define ENC0_OFFSET	0x3000
@@ -4737,4 +4737,4 @@
 #define DPCD_69494		0x69494
 #define DPCD_69518		0x69518
 
-#endif /* SOC_MEDIATEK_MT8195_DRTX_REG_H */
+#endif /* SOC_MEDIATEK_COMMON_DP_DPTX_REG_H */

src/soc/mediatek/mt8195/Makefile.inc

@@ -46,7 +46,7 @@ ramstage-y += ../common/devapc.c devapc.c
 ramstage-y += ../common/dfd.c
 ramstage-y += ../common/dpm.c
 ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
-ramstage-y += dp_intf.c dptx.c dptx_hal.c
+ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c
 ramstage-y += emi.c
 ramstage-y += hdmi.c
 ramstage-y += ../common/mcu.c
@@ -66,6 +66,7 @@ ramstage-y += ../common/ufs.c
 ramstage-y += ../common/usb.c usb.c
 
 CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include
+CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include
 CPPFLAGS_common += -Isrc/soc/mediatek/common/include
 CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/include