From 31c96fe509309b44a49eefd16f17426c6b90895c Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Tue, 14 Sep 2021 14:26:46 -0600 Subject: [PATCH] mb/google/brya: Update state of BB_RT_FORCE_PWR gpios This GPIO is used to force the USB retimers on Type-C ports to stay in a powered state and can be used e.g., during a firmware update to the retimer to force power on even when no device may be connected to the port. However, its power rail is controlled elsewhere and coreboot is not applying a FW update, so this GPIO should be driven low instead. BUG=b:193402306 TEST=compile Change-Id: I976a0b8252b31aacef476d5ee4bcf6b1ef2e79de Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/57653 Tested-by: build bot (Jenkins) Reviewed-by: EricR Lai Reviewed-by: Nick Vaccaro --- src/mainboard/google/brya/variants/baseboard/brask/gpio.c | 2 +- src/mainboard/google/brya/variants/baseboard/brya/gpio.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index ecd5492348..1eb60e737f 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -167,7 +167,7 @@ static const struct pad_config gpio_table[] = { /* E3 : PROC_GP0 ==> TP94644 */ PAD_NC(GPP_E3, NONE), /* E4 : SATA_DEVSLP0 ==> USB4_BB_RT_FORCE_PWR */ - PAD_CFG_GPO(GPP_E4, 1, DEEP), + PAD_CFG_GPO(GPP_E4, 0, DEEP), /* E5 : SATA_DEVSLP1 ==> NC */ PAD_NC(GPP_E5, NONE), /* E6 : THC0_SPI1_RST# ==> GPPE6_STRAP */ diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c index 7dd73bc5a7..4c756291d7 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c @@ -167,7 +167,7 @@ static const struct pad_config gpio_table[] = { /* E3 : PROC_GP0 ==> HPS_INT_ODL */ PAD_CFG_GPI_IRQ_WAKE(GPP_E3, NONE, PLTRST, LEVEL, NONE), /* E4 : SATA_DEVSLP0 ==> USB4_BB_RT_FORCE_PWR */ - PAD_CFG_GPO(GPP_E4, 1, DEEP), + PAD_CFG_GPO(GPP_E4, 0, DEEP), /* E5 : SATA_DEVSLP1 ==> USB_A0_RT_RST_ODL */ PAD_CFG_GPO(GPP_E5, 1, DEEP), /* E6 : THC0_SPI1_RST# ==> GPPE6_STRAP */