Fix a potential system hang by handling AMD Model F Erratum 89

a bit later.

Signed-off-by: Josef Kellermann <seppk@arcor.de>
Acked-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Josef Kellermann 2011-02-10 07:48:07 +00:00 committed by Patrick Georgi
parent b0c94a1866
commit 31e0deac0e
1 changed files with 21 additions and 17 deletions

View File

@ -384,23 +384,6 @@ static inline void k8_errata(void)
wrmsr_amd(DC_CFG_MSR, msr); wrmsr_amd(DC_CFG_MSR, msr);
} }
/* I can't touch this msr on early buggy cpus */
if (!is_cpu_pre_b3()) {
/* Erratum 89 ... */
msr = rdmsr(NB_CFG_MSR);
msr.lo |= 1 << 3;
if (!is_cpu_pre_c0() && is_cpu_pre_d0()) {
/* D0 later don't need it */
/* Erratum 86 Disable data masking on C0 and
* later processor revs.
* FIXME this is only needed if ECC is enabled.
*/
msr.hi |= 1 << (36 - 32);
}
wrmsr(NB_CFG_MSR, msr);
}
/* Erratum 97 ... */ /* Erratum 97 ... */
if (!is_cpu_pre_c0() && is_cpu_pre_d0()) { if (!is_cpu_pre_c0() && is_cpu_pre_d0()) {
@ -445,7 +428,28 @@ static inline void k8_errata(void)
msr.hi |= 1; msr.hi |= 1;
wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr); wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr);
} }
#if CONFIG_K8_REV_F_SUPPORT == 0
/* I can't touch this msr on early buggy cpus */
if (!is_cpu_pre_b3())
#endif
{
/* Erratum 89 ... */
msr = rdmsr(NB_CFG_MSR);
msr.lo |= 1 << 3;
#if CONFIG_K8_REV_F_SUPPORT == 0
if (!is_cpu_pre_c0() && is_cpu_pre_d0()) {
/* D0 later don't need it */
/* Erratum 86 Disable data masking on C0 and
* later processor revs.
* FIXME this is only needed if ECC is enabled.
*/
msr.hi |= 1 << (36 - 32);
}
#endif
wrmsr(NB_CFG_MSR, msr);
}
/* Erratum 122 */ /* Erratum 122 */
msr = rdmsr(HWCR_MSR); msr = rdmsr(HWCR_MSR);
msr.lo |= 1 << 6; msr.lo |= 1 << 6;