Fix a potential system hang by handling AMD Model F Erratum 89
a bit later. Signed-off-by: Josef Kellermann <seppk@arcor.de> Acked-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -384,23 +384,6 @@ static inline void k8_errata(void)
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wrmsr_amd(DC_CFG_MSR, msr);
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}
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/* I can't touch this msr on early buggy cpus */
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if (!is_cpu_pre_b3()) {
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/* Erratum 89 ... */
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msr = rdmsr(NB_CFG_MSR);
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msr.lo |= 1 << 3;
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if (!is_cpu_pre_c0() && is_cpu_pre_d0()) {
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/* D0 later don't need it */
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/* Erratum 86 Disable data masking on C0 and
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* later processor revs.
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* FIXME this is only needed if ECC is enabled.
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*/
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msr.hi |= 1 << (36 - 32);
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}
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wrmsr(NB_CFG_MSR, msr);
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}
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/* Erratum 97 ... */
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if (!is_cpu_pre_c0() && is_cpu_pre_d0()) {
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@ -446,6 +429,27 @@ static inline void k8_errata(void)
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wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr);
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}
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#if CONFIG_K8_REV_F_SUPPORT == 0
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/* I can't touch this msr on early buggy cpus */
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if (!is_cpu_pre_b3())
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#endif
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{
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/* Erratum 89 ... */
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msr = rdmsr(NB_CFG_MSR);
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msr.lo |= 1 << 3;
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#if CONFIG_K8_REV_F_SUPPORT == 0
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if (!is_cpu_pre_c0() && is_cpu_pre_d0()) {
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/* D0 later don't need it */
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/* Erratum 86 Disable data masking on C0 and
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* later processor revs.
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* FIXME this is only needed if ECC is enabled.
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*/
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msr.hi |= 1 << (36 - 32);
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}
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#endif
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wrmsr(NB_CFG_MSR, msr);
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}
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/* Erratum 122 */
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msr = rdmsr(HWCR_MSR);
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msr.lo |= 1 << 6;
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