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arch/x86/include/pci_io_cfg: introduce PCI_IO_CONFIG_[INDEX,DATA] define 

Instead of having multiple instances of the same magic numbers in the
code, introduce and use the PCI_IO_CONFIG_INDEX and PCI_IO_CONFIG_DATA
definitions.

TEST=Timeless build for Mandolin results in identical image.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If6f6f058180cf36cae7921ce3c7aaf1a0c75c7b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Felix Held 2023-04-26 14:40:39 +02:00
parent b3076e5566
commit 31e5133b63
1 changed files with 15 additions and 12 deletions
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27
src/arch/x86/include/arch/pci_io_cfg.h
View File

@ -7,6 +7,9 @@
#include <arch/io.h> #include <arch/io.h>
#include <device/pci_type.h> #include <device/pci_type.h>
#define PCI_IO_CONFIG_INDEX 0xcf8
#define PCI_IO_CONFIG_DATA 0xcfc
static __always_inline static __always_inline
uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg) uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg)
{ {
@ -25,48 +28,48 @@ static __always_inline
uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t reg) uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t reg)
{ {
uint32_t addr = pci_io_encode_addr(dev, reg); uint32_t addr = pci_io_encode_addr(dev, reg);
outl(addr, 0xCF8); outl(addr, PCI_IO_CONFIG_INDEX);
return inb(0xCFC + (reg & 3)); return inb(PCI_IO_CONFIG_DATA + (reg & 3));
} }
static __always_inline static __always_inline
uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t reg) uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t reg)
{ {
uint32_t addr = pci_io_encode_addr(dev, reg); uint32_t addr = pci_io_encode_addr(dev, reg);
outl(addr, 0xCF8); outl(addr, PCI_IO_CONFIG_INDEX);
return inw(0xCFC + (reg & 2)); return inw(PCI_IO_CONFIG_DATA + (reg & 2));
} }
static __always_inline static __always_inline
uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg) uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg)
{ {
uint32_t addr = pci_io_encode_addr(dev, reg); uint32_t addr = pci_io_encode_addr(dev, reg);
outl(addr, 0xCF8); outl(addr, PCI_IO_CONFIG_INDEX);
return inl(0xCFC); return inl(PCI_IO_CONFIG_DATA);
} }
static __always_inline static __always_inline
void pci_io_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value) void pci_io_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{ {
uint32_t addr = pci_io_encode_addr(dev, reg); uint32_t addr = pci_io_encode_addr(dev, reg);
outl(addr, 0xCF8); outl(addr, PCI_IO_CONFIG_INDEX);
outb(value, 0xCFC + (reg & 3)); outb(value, PCI_IO_CONFIG_DATA + (reg & 3));
} }
static __always_inline static __always_inline
void pci_io_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value) void pci_io_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{ {
uint32_t addr = pci_io_encode_addr(dev, reg); uint32_t addr = pci_io_encode_addr(dev, reg);
outl(addr, 0xCF8); outl(addr, PCI_IO_CONFIG_INDEX);
outw(value, 0xCFC + (reg & 2)); outw(value, PCI_IO_CONFIG_DATA + (reg & 2));
} }
static __always_inline static __always_inline
void pci_io_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) void pci_io_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{ {
uint32_t addr = pci_io_encode_addr(dev, reg); uint32_t addr = pci_io_encode_addr(dev, reg);
outl(addr, 0xCF8); outl(addr, PCI_IO_CONFIG_INDEX);
outl(value, 0xCFC); outl(value, PCI_IO_CONFIG_DATA);
} }
#if !CONFIG(ECAM_MMCONF_SUPPORT) #if !CONFIG(ECAM_MMCONF_SUPPORT)