GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

* Maintaining SiS south bridge device IDs. 

* Strip unnecessary driver modules.

Signed-off-by: Morgan Tsai <my_tsai@sis.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Morgan Tsai 2007-11-14 01:34:02 +00:00 committed by Carl-Daniel Hailfinger
parent 4c28034e58
commit 31e805dadb
15 changed files with 92 additions and 441 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
src/include/device/pci_ids.h
View File

@ -2429,29 +2429,60 @@
#define PCI_VENDOR_ID_SIS 0x1039
#define PCI_DEVICE_ID_SIS_AGP 0x0002
/* SiS 761GX NORTH BRIDGE */
#define PCI_DEVICE_ID_SIS_SIS761 0x0761
#define PCI_DEVICE_ID_SIS_SIS966_SB 0x0966
#define PCI_DEVICE_ID_SIS_SIS966_ISA 0x0966
#define PCI_DEVICE_ID_SIS_SIS966_LPC 0x0966
#define PCI_DEVICE_ID_SIS_SIS966_SM2 0x0368
#define PCI_DEVICE_ID_SIS_SIS966_HT 0x0369
#define PCI_DEVICE_ID_SIS_SIS966_PCI 0x0370
#define PCI_DEVICE_ID_SIS_SIS966_SMB 0x25a4
#define PCI_DEVICE_ID_SIS_SIS966_PCIE_A_B 0x000A
#define PCI_DEVICE_ID_SIS_SIS966_PCIE_B_C 0x1002
#define PCI_DEVICE_ID_SIS_SIS966_PCIE_E 0x1003
#define PCI_DEVICE_ID_SIS_SIS966_PCIE_A 0x1004
#define PCI_DEVICE_ID_SIS_SIS966_PCIE_F 0x1005
#define PCI_DEVICE_ID_SIS_SIS966_PCIE_D 0x1006
#define PCI_DEVICE_ID_SIS_SIS966_AC97_AUDIO 0x7012
#define PCI_DEVICE_ID_SIS_SIS966_AC97_MODEM 0x7013
#define PCI_DEVICE_ID_SIS_SIS966_IDE 0x5513
#define PCI_DEVICE_ID_SIS_SIS966_SATA0 0x1183
#define PCI_DEVICE_ID_SIS_SIS966_NIC0 0x0190
#define PCI_DEVICE_ID_SIS_SIS966_NIC1 0x0191
#define PCI_DEVICE_ID_SIS_SIS966_AZA 0x7502
#define PCI_DEVICE_ID_SIS_SIS966_USB 0x7001
#define PCI_DEVICE_ID_SIS_SIS966_USB2 0x7002
#define PCI_DEVICE_ID_SIS_SIS761_PCIE 0x0004
/* SiS 964(L) SOUTH BRIDGE */
#define PCI_DEVICE_ID_SIS_SIS964_LPC 0x0964 /* D2F0 */
#define PCI_DEVICE_ID_SIS_SIS964_IDE 0x5513 /* D2F5 */
#define PCI_DEVICE_ID_SIS_SIS964_AC97_MODEM 0x7013 /* D2F6 */
#define PCI_DEVICE_ID_SIS_SIS964_AC97_AUDIO 0x7012 /* D2F7 */
#define PCI_DEVICE_ID_SIS_SIS964_USB 0x7001 /* D3F0,D3F1 */
#define PCI_DEVICE_ID_SIS_SIS964_USB2 0x7002 /* D3F3 */
#define PCI_DEVICE_ID_SIS_SIS964_NIC 0x0900 /* D4F0 */
#define PCI_DEVICE_ID_SIS_SIS964_SATA 0x0181 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS964_SATA_RAID 0x0180 /* D5F0 */
/* SiS 965(L) SOUTH BRIDGE */
#define PCI_DEVICE_ID_SIS_SIS965_LPC 0x0965 /* D2F0 */
#define PCI_DEVICE_ID_SIS_SIS965_IDE 0x5513 /* D2F5 */
#define PCI_DEVICE_ID_SIS_SIS965_AC97_MODEM 0x7013 /* D2F6 */
#define PCI_DEVICE_ID_SIS_SIS965_AC97_AUDIO 0x7012 /* D2F7 */
#define PCI_DEVICE_ID_SIS_SIS965_USB 0x7001 /* D3F0,D3F1 */
#define PCI_DEVICE_ID_SIS_SIS965_USB2 0x7002 /* D3F3 */
#define PCI_DEVICE_ID_SIS_SIS965L_NIC 0x0190 /* D4F0 */
#define PCI_DEVICE_ID_SIS_SIS965_NIC 0x0191 /* D4F0 */
#define PCI_DEVICE_ID_SIS_SIS965_SATA 0x0183 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS965_SATA_RAID 0x0182 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS965_PCIE 0x000a /* D6F0,D7F0 */
/* SiS 966(L) SOUTH BRIDGE */
#define PCI_DEVICE_ID_SIS_SIS966_LPC 0x0966 /* D2F0 */
#define PCI_DEVICE_ID_SIS_SIS966_IDE 0x5513 /* D2F5 */
#define PCI_DEVICE_ID_SIS_SIS966_AC97_MODEM 0x7013 /* D2F6 */
#define PCI_DEVICE_ID_SIS_SIS966_AC97_AUDIO 0x7012 /* D2F7 */
#define PCI_DEVICE_ID_SIS_SIS966_USB 0x7001 /* D3F0,D3F1 */
#define PCI_DEVICE_ID_SIS_SIS966_USB2 0x7002 /* D3F3 */
#define PCI_DEVICE_ID_SIS_SIS966L_NIC 0x0190 /* D4F0 */
#define PCI_DEVICE_ID_SIS_SIS966_NIC 0x0191 /* D4F0 */
#define PCI_DEVICE_ID_SIS_SIS966_SATA 0x1183 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS966_SATA_RAID 0x1182 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS966_PCIE 0x000a /* D6F0,D7F0 */
#define PCI_DEVICE_ID_SIS_SIS966_HD_AUDIO 0x7502 /* DfF0 */
/* SiS 968 SOUTH BRIDGE */
#define PCI_DEVICE_ID_SIS_SIS968_LPC 0x0968 /* D2F0 */
#define PCI_DEVICE_ID_SIS_SIS968_IDE 0x5513 /* D2F5 */
#define PCI_DEVICE_ID_SIS_SIS968_USB 0x7001 /* D3F0,D3F1 */
#define PCI_DEVICE_ID_SIS_SIS968_USB2 0x7002 /* D3F3 */
#define PCI_DEVICE_ID_SIS_SIS968_NIC 0x0191 /* D4F0 */
#define PCI_DEVICE_ID_SIS_SIS968_SATA 0x1183 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS968_SATA_RAID 0x1184 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS968_SATA_AHCI 0x1185 /* D5F0 */
#define PCI_DEVICE_ID_SIS_SIS968_PCIE 0x000a /* D6F0,D7F0 */
#define PCI_DEVICE_ID_SIS_SIS968_HD_AUDIO 0x7502 /* DfF0 */
/* OLD USAGE FOR LINUXBIOS */
#define PCI_VENDOR_ID_ACER 0x10b9

10
src/mainboard/gigabyte/ga_2761gxdk/Config.lb
View File

@ -295,9 +295,9 @@ chip northbridge/amd/amdk8/root_complex
device pci 3.1 on end # USB (SiS7001,USB1.1)
device pci 3.3 on end # USB (SiS7002,USB2.0)
device pci 4.0 on end # NIC (SiS191)
device pci 5.0 on end # SATA (SiS1183,IDE Mode)
device pci 6.0 off end # PCI-E (SiS000A)
device pci 7.0 off end # PCI-E (SiS000A)
device pci 5.0 on end # SATA (SiS1183,Native Mode)
device pci 6.0 on end # PCI-e x1
device pci 7.0 on end # PCI-e x1
device pci a.0 off end
device pci b.0 off end
device pci c.0 off end
@ -323,9 +323,9 @@ chip northbridge/amd/amdk8/root_complex
# chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# device pnp 0.1 on end # pci_regs_all
# device pnp 0.2 on end # mem
# device pnp 0.2 off end # mem
# device pnp 0.3 off end # cpuid
# device pnp 0.4 on end # smbus_regs_all
# device pnp 0.4 off end # smbus_regs_all
# device pnp 0.5 off end # dual core msr
# device pnp 0.6 off end # cache size
# device pnp 0.7 off end # tsc

11
src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c
View File

@ -89,7 +89,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->exclusive_irqs = 0;
pirq->rtr_vendor = PCI_VENDOR_ID_SIS;
pirq->rtr_device = PCI_DEVICE_ID_SIS_SIS966_PCI;
pirq->rtr_device = PCI_DEVICE_ID_SIS_SIS966_LPC;
pirq->miniport_data = 0;
@ -102,6 +102,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
device_t dev;
dev = dev_find_slot(0, PCI_DEVFN(2,0));
if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
@ -142,14 +143,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pci_write_config8(dev, 0x3C, 0x05);
dev = dev_find_slot(0, PCI_DEVFN(5,0)); // 1183 (SATA)
pci_write_config8(dev, 0x3C, 0x0B);
/*
* Non-layout for GA-2761GX
*
dev = dev_find_slot(0, PCI_DEVFN(6,0)); // PCI-E
pci_write_config8(dev, 0x3C, 0x0A);
dev = dev_find_slot(0, PCI_DEVFN(7,0)); // PCI-E
pci_write_config8(dev, 0x3C, 0x0A);
/*
* Non-layout for GA-2761GX
*
dev = dev_find_slot(0, PCI_DEVFN(15,0)); // Azalia
pci_write_config8(dev, 0x3C, 0x05);
*/

9
src/southbridge/sis/sis966/Config.lb
View File

@ -22,15 +22,12 @@
config chip.h
driver sis761.o
driver sis966.o
driver sis966_usb.o
driver sis966_lpc.o
driver sis966_smbus.o
driver sis966_ide.o
driver sis966_sata.o
driver sis966_usb.o
driver sis966_usb2.o
driver sis966_aza.o
driver sis966_nic.o
driver sis966_pci.o
driver sis966_sata.o
driver sis966_pcie.o
driver sis966_ht.o
driver sis966_aza.o
object sis966_reset.o

17
src/southbridge/sis/sis966/sis761.c
View File

@ -73,27 +73,19 @@ static inline msr_t rdmsr(unsigned index)
return result;
}
static void sis761_read_resources(device_t dev)
{
/* Read the generic PCI resources */
printk_debug("sis761_read_resources\n");
printk_debug("sis761_read_resources ------->\n");
pci_dev_read_resources(dev);
/* If we are not the first processor don't allocate the gart apeture */
if (dev->path.u.pci.devfn != PCI_DEVFN(0x0, 0)) {
printk_debug("sis761_not_the_first_processor !!!\n");
return;
}
return;
}
static void set_agp_aperture(device_t dev)
{
printk_debug("sis761_read_resources <-------\n");
return;
}
@ -101,8 +93,6 @@ static void set_agp_aperture(device_t dev)
static void sis761_set_resources(device_t dev)
{
printk_debug("sis761_set_resources ------->\n");
/* Set the gart apeture */
// set_agp_aperture(dev);
/* Set the generic PCI resources */
pci_dev_set_resources(dev);
@ -124,7 +114,6 @@ static void sis761_init(struct device *dev)
outb(inb(0x856) | 0x40, 0x856); // Auto-Reset Function
printk_debug("sis761_init: <----------\n");
printk_debug("done.\n");
}

41
src/southbridge/sis/sis966/sis966.c
View File

@ -85,9 +85,6 @@ void sis966_enable(device_t dev)
devfn = (dev->path.u.pci.devfn) & ~7;
switch(deviceid) {
case PCI_DEVICE_ID_SIS_SIS966_HT:
return;
break;
case PCI_DEVICE_ID_SIS_SIS966_USB:
devfn -= (1<<3);
index = 8;
@ -96,7 +93,7 @@ void sis966_enable(device_t dev)
devfn -= (1<<3);
index = 20;
break;
case PCI_DEVICE_ID_SIS_SIS966_NIC1:
case PCI_DEVICE_ID_SIS_SIS966_NIC:
devfn -= (7<<3);
index = 10;
for(i=0;i<2;i++) {
@ -107,7 +104,7 @@ void sis966_enable(device_t dev)
break;
}
break;
case PCI_DEVICE_ID_SIS_SIS966_AZA:
case PCI_DEVICE_ID_SIS_SIS966_HD_AUDIO:
devfn -= (5<<3);
index = 11;
break;
@ -115,7 +112,7 @@ void sis966_enable(device_t dev)
devfn -= (3<<3);
index = 14;
break;
case PCI_DEVICE_ID_SIS_SIS966_SATA0:
case PCI_DEVICE_ID_SIS_SIS966_SATA:
devfn -= (4<<3);
index = 22;
i = (dev->path.u.pci.devfn) & 7;
@ -123,32 +120,9 @@ void sis966_enable(device_t dev)
index -= (i+3);
}
break;
case PCI_DEVICE_ID_SIS_SIS966_PCI:
devfn -= (5<<3);
index = 15;
break;
case PCI_DEVICE_ID_SIS_SIS966_PCIE_B_C:
devfn -= (0xa<<3); // to LPC
index2 = 8;
for(i=0;i<2;i++) {
lpc_dev = find_lpc_dev(dev, devfn - (i<<3));
if(!lpc_dev) continue;
index2 -= i;
devfn -= (i<<3);
break;
}
break;
case PCI_DEVICE_ID_SIS_SIS966_PCIE_D:
devfn -= (0xc<<3); // to LPC
index2 = 6;
break;
case PCI_DEVICE_ID_SIS_SIS966_PCIE_E:
devfn -= (0xd<<3); // to LPC
index2 = 5;
break;
case PCI_DEVICE_ID_SIS_SIS966_PCIE_F:
devfn -= (0xe<<3); // to LPC
index2 = 4;
case PCI_DEVICE_ID_SIS_SIS966_PCIE:
devfn -= (0x9<<3); // to LPC
index2 = 9;
break;
default:
index = 0;
@ -191,7 +165,6 @@ void sis966_enable(device_t dev)
byte = pci_read_config8(lpc_dev, 0xdd);
byte |= ((1<<0)|(1<<3)); // expose the BAR and enable write
pci_write_config8(dev, 0xdd, byte);
return;
}
@ -219,8 +192,6 @@ void sis966_enable(device_t dev)
}
}
}
struct chip_operations southbridge_sis_sis966_ops = {

2
src/southbridge/sis/sis966/sis966_aza.c
View File

@ -328,6 +328,6 @@ static struct device_operations aza_audio_ops = {
static const struct pci_driver azaaudio_driver __pci_driver = {
.ops = &aza_audio_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_AZA,
.device = PCI_DEVICE_ID_SIS_SIS966_HD_AUDIO,
};

2
src/southbridge/sis/sis966/sis966_early_ctrl.c
View File

@ -25,7 +25,7 @@ static unsigned get_sbdn(unsigned bus)
/* Find the device. */
dev = pci_locate_device_on_bus(
PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_HT),
PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761),
bus);
return (dev>>15) & 0x1f;

17
src/southbridge/sis/sis966/sis966_early_smbus.c
View File

@ -59,6 +59,7 @@ static const uint8_t SiS_LPC_init[34][3]={
{0xDF, 0x00, 0xAA}, //Reg 0xDF
{0x00, 0x00, 0x00} //End of table
};
static const uint8_t SiS_NBPCIE_init[43][3]={
{0x3D, 0x00, 0x00}, //Reg 0x3D
{0x1C, 0xFE, 0x01}, //Reg 0x1C
@ -80,7 +81,6 @@ static const uint8_t SiS_NBPCIE_init[43][3]={
{0x5E, 0x00, 0x10}, //Reg 0x5E
{0x34, 0x00, 0xD0}, //Reg 0x34
{0xD0, 0x00, 0x01}, //Reg 0xD0
{0x4F, 0x00, 0x80}, //Reg 0x4F
{0xA1, 0x00, 0xF4}, //Reg 0xA1
{0xA2, 0x7F, 0x00}, //Reg 0xA2
@ -105,6 +105,7 @@ static const uint8_t SiS_NBPCIE_init[43][3]={
{0x4F, 0x00, 0x00}, //Reg 0x4F
{0x00, 0x00, 0x00} //End of table
};
static const uint8_t SiS_ACPI_init[10][3]={
{0x1B, 0xBF, 0x40}, //Reg 0x1B
{0x84, 0x00, 0x0E}, //Reg 0x84
@ -117,6 +118,7 @@ static const uint8_t SiS_ACPI_init[10][3]={
{0x6F, 0xFF, 0x14}, //Reg 0x6F
{0x00, 0x00, 0x00} //End of table
};
static const uint8_t SiS_SBPCIE_init[13][3]={
{0x48, 0x00 ,0x07}, //Reg 0x48
{0x49, 0x00 ,0x06}, //Reg 0x49
@ -133,8 +135,6 @@ static const uint8_t SiS_SBPCIE_init[13][3]={
{0x00, 0x00, 0x00} //End of table
};
static const uint8_t SiS_NB_init[56][3]={
{0x04, 0x00 ,0x07}, //Reg 0x04
{0x05, 0x00 ,0x00}, //Reg 0x05 // alex
@ -191,11 +191,9 @@ static const uint8_t SiS_NB_init[56][3]={
{0x97, 0x00 ,0x00}, //Reg 0x97
{0x98, 0x00 ,0x00}, //Reg 0x98
{0x99, 0x00 ,0x00}, //Reg 0x99
{0x00, 0x00, 0x00} //End of table
};
static const uint8_t SiS_NBAGP_init[34][3]={
{0xCF, 0xDF, 0x00}, //HT issue
{0x06, 0xDF, 0x20},
@ -230,8 +228,6 @@ static const uint8_t SiS_NBAGP_init[34][3]={
{0xBF, 0xF9, 0x06},
{0xBA, 0x00, 0x61},
{0xBD, 0x7F, 0x80},
{0x00, 0x00, 0x00} //End of table
};
@ -341,7 +337,6 @@ static const uint8_t SiS_SiS1183_init[44][3]={
{0x00, 0x00, 0x00} //End of table
};
/* In => Share Memory size
=> 00h : 0MBytes
=> 02h : 32MBytes
@ -421,7 +416,7 @@ void sis_init_stage1(void)
GUI_En = temp8 & 0x10;
pci_write_config8(dev, 0x4C, temp8 & (!0x10));
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, 0x0004), 0);
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761_PCIE), 0);
i=0;
while(SiS_NBPCIE_init[i][0] != 0)
{ temp8 = pci_read_config8(dev, SiS_NBPCIE_init[i][0]);
@ -513,7 +508,7 @@ void sis_init_stage2(void)
// ========================== Misc =============================
printk_debug("Init Misc -------->\n");
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_ISA), 0);
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_LPC), 0);
// PCI Device Enable
pci_write_config8(dev, 0x7C, 0x03); // bit0=0 : enable audio controller(), bit1=1 : disable modem
pci_write_config8(dev, 0x76, pci_read_config8(dev, 0x76)|0x30); // SM bus enable, PCIEXP Controller 1 and 2 disable
@ -523,7 +518,7 @@ void sis_init_stage2(void)
outb(temp8, 0x878); // ACPI select AC97 or HDA controller
printk_debug("Audio select %x\n",inb(0x878));
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_SATA0), 0);
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_SATA), 0);
if(!dev){
print_debug("SiS 1183 does not exist !!");
}

56
src/southbridge/sis/sis966/sis966_ht.c
View File

@ -1,56 +0,0 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2004 Tyan Computer
* Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
* Copyright (C) 2006,2007 AMD
* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
* Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
* Written by Morgan Tsai <my_tsai@sis.com> for SiS.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include "sis966.h"
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
}
static struct pci_operations lops_pci = {
.set_subsystem = lpci_set_subsystem,
};
static struct device_operations ht_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = 0,
.ops_pci = &lops_pci,
};
static const struct pci_driver ht_driver __pci_driver = {
.ops = &ht_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_HT,
};

2
src/southbridge/sis/sis966/sis966_nic.c
View File

@ -365,5 +365,5 @@ static struct device_operations nic_ops = {
static const struct pci_driver nic_driver __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_NIC1,
.device = PCI_DEVICE_ID_SIS_SIS966_NIC,
};

104
src/southbridge/sis/sis966/sis966_pci.c
View File

@ -1,104 +0,0 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2004 Tyan Computer
* Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
* Copyright (C) 2006,2007 AMD
* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
* Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
* Written by Morgan Tsai <my_tsai@sis.com> for SiS.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include "sis966.h"
static void pci_init(struct device *dev)
{
uint32_t dword;
uint16_t word;
#if CONFIG_PCI_64BIT_PREF_MEM == 1
device_t pci_domain_dev;
struct resource *mem1, *mem2;
#endif
/* System error enable */
dword = pci_read_config32(dev, 0x04);
dword |= (1<<8); /* System error enable */
dword |= (1<<30); /* Clear possible errors */
pci_write_config32(dev, 0x04, dword);
word = pci_read_config16(dev, 0x48);
word |= (1<<0); /* MRL2MRM */
word |= (1<<2); /* MR2MRM */
pci_write_config16(dev, 0x48, word);
dword = pci_read_config32(dev, 0x4c);
dword |= 0x00440000; /*TABORT_SER_ENABLE Park Last Enable.*/
pci_write_config32(dev, 0x4c, dword);
#if CONFIG_PCI_64BIT_PREF_MEM == 1
pci_domain_dev = dev->bus->dev;
while(pci_domain_dev) {
if(pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) break;
pci_domain_dev = pci_domain_dev->bus->dev;
}
if(!pci_domain_dev) return; // impossiable
mem1 = find_resource(pci_domain_dev, 1); // prefmem, it could be 64bit
mem2 = find_resource(pci_domain_dev, 2); // mem
if(mem1->base > mem2->base) {
dword = mem2->base & (0xffff0000UL);
printk_debug("PCI DOMAIN mem2 base = 0x%010Lx\n", mem2->base);
} else {
dword = mem1->base & (0xffff0000UL);
printk_debug("PCI DOMAIN mem1 (prefmem) base = 0x%010Lx\n", mem1->base);
}
#else
dword = dev_root.resource[1].base & (0xffff0000UL);
printk_debug("dev_root mem base = 0x%010Lx\n", dev_root.resource[1].base);
#endif
printk_debug("[0x50] <-- 0x%08x\n", dword);
pci_write_config32(dev, 0x50, dword); //TOM
}
static struct pci_operations lops_pci = {
.set_subsystem = 0,
};
static struct device_operations pci_ops = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
.init = pci_init,
.scan_bus = pci_scan_bridge,
// .enable = sis966_enable,
.reset_bus = pci_bus_reset,
.ops_pci = &lops_pci,
};
static const struct pci_driver pci_driver __pci_driver = {
.ops = &pci_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_PCI,
};

22
src/southbridge/sis/sis966/sis966_pcie.c
View File

@ -61,26 +61,6 @@ static struct device_operations pcie_ops = {
static const struct pci_driver pciebc_driver __pci_driver = {
.ops = &pcie_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_PCIE_B_C,
};
static const struct pci_driver pciee_driver __pci_driver = {
.ops = &pcie_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_PCIE_E,
};
static const struct pci_driver pciea_driver __pci_driver = {
.ops = &pcie_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_PCIE_A,
};
static const struct pci_driver pcief_driver __pci_driver = {
.ops = &pcie_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_PCIE_F,
};
static const struct pci_driver pcied_driver __pci_driver = {
.ops = &pcie_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_PCIE_D,
.device = PCI_DEVICE_ID_SIS_SIS966_PCIE,
};

2
src/southbridge/sis/sis966/sis966_sata.c
View File

@ -193,5 +193,5 @@ static struct device_operations sata_ops = {
static const struct pci_driver sata0_driver __pci_driver = {
.ops = &sata_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_SATA0,
.device = PCI_DEVICE_ID_SIS_SIS966_SATA,
};

153
src/southbridge/sis/sis966/sis966_smbus.c
View File

@ -1,153 +0,0 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2004 Tyan Computer
* Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
* Copyright (C) 2006,2007 AMD
* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
* Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
* Written by Morgan Tsai <my_tsai@sis.com> for SiS.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <bitops.h>
#include <arch/io.h>
#include "sis966.h"
#include "sis966_smbus.h"
static int lsmbus_recv_byte(device_t dev)
{
unsigned device;
struct resource *res;
struct bus *pbus;
device = dev->path.u.i2c.device;
pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
return do_smbus_recv_byte(res->base, device);
}
static int lsmbus_send_byte(device_t dev, uint8_t val)
{
unsigned device;
struct resource *res;
struct bus *pbus;
device = dev->path.u.i2c.device;
pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
return do_smbus_send_byte(res->base, device, val);
}
static int lsmbus_read_byte(device_t dev, uint8_t address)
{
unsigned device;
struct resource *res;
struct bus *pbus;
device = dev->path.u.i2c.device;
pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
return do_smbus_read_byte(res->base, device, address);
}
static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
{
unsigned device;
struct resource *res;
struct bus *pbus;
device = dev->path.u.i2c.device;
pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
return do_smbus_write_byte(res->base, device, address, val);
}
static struct smbus_bus_operations lops_smbus_bus = {
.recv_byte = lsmbus_recv_byte,
.send_byte = lsmbus_send_byte,
.read_byte = lsmbus_read_byte,
.write_byte = lsmbus_write_byte,
};
#if HAVE_ACPI_TABLES == 1
unsigned pm_base;
#endif
static void sis966_sm_read_resources(device_t dev)
{
unsigned long index;
/* Get the normal pci resources of this device */
pci_dev_read_resources(dev);
for (index = 0x60; index <= 0x68; index+=4) { // We got another 3.
pci_get_resource(dev, index);
}
compact_resources(dev);
}
static void sis966_sm_init(device_t dev)
{
#if HAVE_ACPI_TABLES == 1
struct resource *res;
res = find_resource(dev, 0x60);
if (res)
pm_base = res->base;
#endif
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
}
static struct pci_operations lops_pci = {
.set_subsystem = lpci_set_subsystem,
};
static struct device_operations smbus_ops = {
.read_resources = sis966_sm_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = sis966_sm_init,
.scan_bus = scan_static_bus,
// .enable = sis966_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,
};
static const struct pci_driver smbus_driver __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_SIS,
.device = PCI_DEVICE_ID_SIS_SIS966_SM2,
};