riscv-trap-handling: Add preliminary trap handling for riscv
RISCV requires a trap handler at the machine stage to deal with misaligned loads/stores, as well as to deal with calls that a linux payload will make in its setup. Put required assembly for jumping into and out of a trap here to be set up by the bootblock in a later commit. Change-Id: Ibf6b18e477aaa1c415a31dbeffa50a2470a7ab2e Signed-off-by: Thaminda Edirisooriya <thaminda@google.com> Reviewed-on: http://review.coreboot.org/11367 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
This commit is contained in:
Thaminda Edirisooriya
Ronald G. Minnich
parent
5cd34e2f15
commit
31f0521a99
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/*
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* Copyright (c) 2013, The Regents of the University of California (Regents).
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* All Rights Reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Regents nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* IN NO EVENT SHALL REGENTS BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT,
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* SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS, ARISING
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* OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF REGENTS HAS
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* REGENTS SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE. THE SOFTWARE AND ACCOMPANYING DOCUMENTATION, IF ANY, PROVIDED
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* HEREUNDER IS PROVIDED "AS IS". REGENTS HAS NO OBLIGATION TO PROVIDE
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* MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
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*/
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#ifndef _BITS_H
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#define _BITS_H
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#define CONST_POPCOUNT2(x) ((((x) >> 0) & 1) + (((x) >> 1) & 1))
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#define CONST_POPCOUNT4(x) (CONST_POPCOUNT2(x) + CONST_POPCOUNT2((x)>>2))
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#define CONST_POPCOUNT8(x) (CONST_POPCOUNT4(x) + CONST_POPCOUNT4((x)>>4))
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#define CONST_POPCOUNT16(x) (CONST_POPCOUNT8(x) + CONST_POPCOUNT8((x)>>8))
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#define CONST_POPCOUNT32(x) (CONST_POPCOUNT16(x) + CONST_POPCOUNT16((x)>>16))
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#define CONST_POPCOUNT64(x) (CONST_POPCOUNT32(x) + CONST_POPCOUNT32((x)>>32))
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#define CONST_POPCOUNT(x) CONST_POPCOUNT64(x)
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#define CONST_CTZ2(x) CONST_POPCOUNT2(((x) & -(x))-1)
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#define CONST_CTZ4(x) CONST_POPCOUNT4(((x) & -(x))-1)
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#define CONST_CTZ8(x) CONST_POPCOUNT8(((x) & -(x))-1)
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#define CONST_CTZ16(x) CONST_POPCOUNT16(((x) & -(x))-1)
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#define CONST_CTZ32(x) CONST_POPCOUNT32(((x) & -(x))-1)
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#define CONST_CTZ64(x) CONST_POPCOUNT64(((x) & -(x))-1)
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#define CONST_CTZ(x) CONST_CTZ64(x)
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#define STR(x) XSTR(x)
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#define XSTR(x) #x
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# define SLL32 sllw
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# define STORE sd
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# define LOAD ld
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# define LOG_REGBYTES 3
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#define REGBYTES (1 << LOG_REGBYTES)
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#endif
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/*
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* Early initialization code for riscv
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*
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* Copyright 2015 Google Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <bits.h>
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.macro restore_regs
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# restore x registers
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LOAD x1,1*REGBYTES(a0)
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LOAD x2,2*REGBYTES(a0)
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LOAD x3,3*REGBYTES(a0)
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LOAD x4,4*REGBYTES(a0)
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LOAD x5,5*REGBYTES(a0)
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LOAD x6,6*REGBYTES(a0)
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LOAD x7,7*REGBYTES(a0)
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LOAD x8,8*REGBYTES(a0)
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LOAD x9,9*REGBYTES(a0)
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LOAD x11,11*REGBYTES(a0)
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LOAD x12,12*REGBYTES(a0)
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LOAD x13,13*REGBYTES(a0)
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LOAD x14,14*REGBYTES(a0)
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LOAD x15,15*REGBYTES(a0)
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LOAD x16,16*REGBYTES(a0)
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LOAD x17,17*REGBYTES(a0)
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LOAD x18,18*REGBYTES(a0)
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LOAD x19,19*REGBYTES(a0)
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LOAD x20,20*REGBYTES(a0)
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LOAD x21,21*REGBYTES(a0)
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LOAD x22,22*REGBYTES(a0)
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LOAD x23,23*REGBYTES(a0)
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LOAD x24,24*REGBYTES(a0)
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LOAD x25,25*REGBYTES(a0)
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LOAD x26,26*REGBYTES(a0)
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LOAD x27,27*REGBYTES(a0)
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LOAD x28,28*REGBYTES(a0)
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LOAD x29,29*REGBYTES(a0)
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LOAD x30,30*REGBYTES(a0)
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LOAD x31,31*REGBYTES(a0)
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# restore a0 last
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LOAD x10,10*REGBYTES(a0)
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.endm
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.macro save_tf
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# save gprs
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STORE x1,1*REGBYTES(x2)
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STORE x3,3*REGBYTES(x2)
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STORE x4,4*REGBYTES(x2)
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STORE x5,5*REGBYTES(x2)
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STORE x6,6*REGBYTES(x2)
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STORE x7,7*REGBYTES(x2)
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STORE x8,8*REGBYTES(x2)
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STORE x9,9*REGBYTES(x2)
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STORE x10,10*REGBYTES(x2)
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STORE x11,11*REGBYTES(x2)
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STORE x12,12*REGBYTES(x2)
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STORE x13,13*REGBYTES(x2)
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STORE x14,14*REGBYTES(x2)
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STORE x15,15*REGBYTES(x2)
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STORE x16,16*REGBYTES(x2)
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STORE x17,17*REGBYTES(x2)
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STORE x18,18*REGBYTES(x2)
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STORE x19,19*REGBYTES(x2)
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STORE x20,20*REGBYTES(x2)
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STORE x21,21*REGBYTES(x2)
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STORE x22,22*REGBYTES(x2)
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STORE x23,23*REGBYTES(x2)
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STORE x24,24*REGBYTES(x2)
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STORE x25,25*REGBYTES(x2)
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STORE x26,26*REGBYTES(x2)
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STORE x27,27*REGBYTES(x2)
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STORE x28,28*REGBYTES(x2)
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STORE x29,29*REGBYTES(x2)
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STORE x30,30*REGBYTES(x2)
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STORE x31,31*REGBYTES(x2)
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# get sr, epc, badvaddr, cause
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csrrw t0,mscratch,x0
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csrr s0,mstatus
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csrr t1,mepc
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csrr t2,mbadaddr
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csrr t3,mcause
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STORE t0,2*REGBYTES(x2)
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STORE s0,32*REGBYTES(x2)
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STORE t1,33*REGBYTES(x2)
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STORE t2,34*REGBYTES(x2)
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STORE t3,35*REGBYTES(x2)
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# get faulting insn, if it wasn't a fetch-related trap
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li x5,-1
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STORE x5,36*REGBYTES(x2)
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1:
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.endm
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.text
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.global supervisor_trap_entry
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supervisor_trap_entry:
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csrw mscratch, sp
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# load in the top of the machine stack
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la sp, 0x80FFF0
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1:addi sp,sp,-320
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save_tf
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move a0,sp
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jal trap_handler
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.global trap_entry
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trap_entry:
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csrw mscratch, sp
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1:addi sp,sp,-320
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save_tf_
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move a0,sp
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jal trap_handler
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.global supervisor_call_return
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supervisor_call_return:
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csrr a0, mscratch
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restore_regs
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eret # go back into supervisor call
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.global machine_call_return
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machine_call_return:
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csrr a0, mscratch
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restore_regs
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eret # go back into machine call
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