diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.h b/src/northbridge/intel/fsp_sandybridge/northbridge.h
index f995b941e1..ab428c318f 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.h
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.h
@@ -55,8 +55,10 @@
 #define DEFAULT_EPBAR		0xfed19000	/* 4 KB */
 #define DEFAULT_RCBABASE	((u8 *)0xfed1c000)
 
-#if CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X)
 #include <southbridge/intel/fsp_bd82x6x/pch.h>
+#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
+#include <southbridge/intel/fsp_i89xx/pch.h>
 #endif
 
 /* Everything below this line is ignored in the DSDT */
diff --git a/src/northbridge/intel/fsp_sandybridge/report_platform.c b/src/northbridge/intel/fsp_sandybridge/report_platform.c
index cd094bba88..004b57e004 100644
--- a/src/northbridge/intel/fsp_sandybridge/report_platform.c
+++ b/src/northbridge/intel/fsp_sandybridge/report_platform.c
@@ -18,8 +18,11 @@
 #include <arch/cpu.h>
 #include <string.h>
 
-#if CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X
+
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X)
 #include <southbridge/intel/fsp_bd82x6x/pch.h>
+#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
+#include <southbridge/intel/fsp_i89xx/pch.h>
 #endif
 
 #include <arch/io.h>