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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2004-11-26 01:09:49 +00:00
parent 08d2d5a5c2
commit 31f6606aea
11 changed files with 0 additions and 721 deletions
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10
src/mainboard/motorola/sandpointx3_altimus_mpc7410/clock.c
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@ -1,10 +0,0 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#include <ppc.h>
unsigned long get_timer_freq(void)
{
return 100000000 / 4;
}

35
src/mainboard/motorola/sandpointx3_altimus_mpc7410/flash.h
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@ -1,35 +0,0 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#ifndef _FLASH_H
#define _FLASH_H
struct flash_device;
typedef struct flash_fn
{
const char *(* identify)(struct flash_device *flash);
void *(* ptr)(void *data);
int (* erase_all)(void *data);
int (* erase)(void *data, unsigned offset, unsigned length);
int (* program)(void *data, unsigned offset, const void *source, unsigned length);
uint8_t ( *read_byte)(void *data, unsigned offset);
} flash_fn;
typedef struct flash_device
{
const flash_fn *fn;
char *tag;
void *data;
unsigned long base;
unsigned size;
unsigned erase_size;
unsigned store_size;
struct flash_device *next;
} flash_device;
int register_flash_device(const flash_fn *fn, char *tag, void *data);
flash_device *find_flash_device(const char *tag);
int init_flash_amd800(char *tag, unsigned base, unsigned spacing);
#endif

2
src/mainboard/motorola/sandpointx3_altimus_mpc7410/flash/Config.lb
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@ -1,2 +0,0 @@
object flash.o
object amd800.o

228
src/mainboard/motorola/sandpointx3_altimus_mpc7410/flash/amd800.c
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@ -1,228 +0,0 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#include <console/console.h>
#include <stdlib.h>
#include "../flash.h"
struct data_amd800
{
unsigned base;
unsigned spacing;
unsigned cs;
const char *tag;
};
static const char *identify_amd (struct flash_device *flash_device);
static int erase_flash_amd800 (void *data, unsigned offset, unsigned length);
static int program_flash_amd800 (void *data, unsigned offset, const void *source,
unsigned length);
static uint8_t read_byte_amd800(void *data, unsigned offset);
static flash_fn fn_amd800 = {
identify_amd,
0,
0,
erase_flash_amd800,
program_flash_amd800,
read_byte_amd800
};
const char *identify_amd (struct flash_device *flash_device)
{
struct data_amd800 *d800 = flash_device->data;
if (!d800->tag)
{
volatile unsigned char *flash =
(volatile unsigned char *) d800->base;
unsigned char type,
id;
*(flash + 0xaaa * d800->spacing) = 0xaa;
*(flash + 0x555 * d800->spacing) = 0x55;
*(flash + 0xaaa * d800->spacing) = 0x90;
type = *(flash + 2 * d800->spacing);
id = *flash;
*flash = 0xf0;
if ((id == 1 || id == 0x20) && type == 0x5b)
{
d800->cs = 45;
d800->tag = "Am29LV800BB";
flash_device->base = d800->base;
flash_device->size = 1024*1024;
flash_device->erase_size = 64*1024;
flash_device->store_size = 1;
}
else
{
printk_info("Unknown flash ID: 0x%02x 0x%02x\n", id, type);
}
}
return d800->tag;
}
int erase_flash_amd800 (void *data, unsigned offset, unsigned length)
{
struct data_amd800 *d800 = data;
volatile unsigned char *flash = (volatile unsigned char *) d800->base;
volatile unsigned char *flash_aaa = flash + 0xaaa * d800->spacing;
volatile unsigned char *flash_555 = flash + 0x555 * d800->spacing;
int id;
int cs = 9999;
printk_info("Erase from 0x%08x to 0x%08x\n", offset, offset + length);
*flash_aaa = 0xAA; // Chip Erase
*flash_555 = 0x55;
*flash_aaa = 0x80;
*flash_aaa = 0xAA;
*flash_555 = 0x55;
*flash_aaa = 0x10;
for (; cs > 0; cs--)
{
id = *(flash + 16);
if (id & 0xA0) // DQ7 or DQ5 set: done or error
break;
printk_info("%4d\b\b\b\b", cs);
}
*flash_aaa = 0xF0; // In case of error
printk_info("\b\b\b\b \b\b\b\b");
if (cs == 0)
{
printk_info("Could not erase flash, timeout.\n");
return -1;
}
else if ((id & 0x80) == 0)
{
printk_info("Could not erase flash, status=%02x.\n", id);
return -1;
}
printk_info("Flash erased\n");
return 0;
}
int init_flash_amd800 (char *tag, unsigned base, unsigned spacing)
{
struct data_amd800 *data = malloc (sizeof (struct data_amd800));
if (data)
{
data->base = base;
data->spacing = spacing;
data->tag = 0;
if (register_flash_device (&fn_amd800, tag, data) < 0)
{
free (data);
return -1;
}
}
else
return -1;
return 0;
}
int program_flash_amd800 (void *data, unsigned offset, const void *source,
unsigned length)
{
struct data_amd800 *d800 = data;
volatile unsigned char *flash = (volatile unsigned char *) d800->base;
volatile unsigned char *flash_aaa = flash + 0xaaa * d800->spacing;
volatile unsigned char *flash_555 = flash + 0x555 * d800->spacing;
int id = 0;
int cs;
int errs = 0;
volatile char *s;
volatile char *d;
printk_info("Program from 0x%08x to 0x%08x\n", offset, offset + length);
printk_info("Data at %p\n", source);
*flash_aaa = 0xAA; // Unlock Bypass
*flash_555 = 0x55;
*flash_aaa = 0x20;
s = (unsigned char *) source;
d = flash + offset * d800->spacing;
cs = length;
while (cs > 0 && !errs)
{
*flash = 0xA0; // Unlock Bypass Program
*d = *s; // Program data
while (1)
{
id = *d;
if ((id & 0x80) == (*s & 0x80)) // DQ7 right? => program done
break;
else if (id & 0x20)
{ // DQ5 set? => maybe errors
id = *d;
if ((id & 0x80) != (*s & 0x80))
{
errs++;
break;
}
}
}
// PRINT("Set %08lx = %02x\n", d, *d);
s += 1;
d += d800->spacing;
cs--;
}
*flash = 0x90; // Unlock Bypass Program Reset
*flash = 0x00;
*flash = 0xF0;
if (errs != 0)
{
printk_info("FAIL: Status=%02x Address=%p.\n", id, d - d800->spacing);
return -1;
}
printk_info("OK.\n");
// Step 4: Verify the flash.
printk_info(" Verifying flash : ...");
errs = 0;
s = (unsigned char *) source;
d = flash + offset * d800->spacing;
for (cs = 0; cs < length; cs++)
{
if (*s != *d)
{
if (errs == 0)
printk_info("ERROR: Addr: %08p, PCI: %02x Lcl: %02x.\n",
s, *s, *d);
errs++;
}
s += 1;
d += d800->spacing;
}
if (errs == 0)
printk_info("OK.\n");
else
{
printk_info(" FAIL: %d errors.\n", errs);
return -1;
}
return 0;
}
uint8_t read_byte_amd800 (void *data, unsigned offset)
{
struct data_amd800 *d800 = data;
volatile unsigned char *flash = (volatile unsigned char *) d800->base;
return *(flash + offset * d800->spacing);
}

46
src/mainboard/motorola/sandpointx3_altimus_mpc7410/flash/flash.c
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@ -1,46 +0,0 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#include <string.h>
#include <console/console.h>
#include <stdlib.h>
#include "../flash.h"
static flash_device *first_flash = 0;
int register_flash_device (const flash_fn * fn, char *tag, void *data)
{
flash_device *device = malloc (sizeof (flash_device));
if (device)
{
const char *result;
device->fn = fn;
device->tag = tag;
device->data = data;
if ((result = fn->identify(device)) != 0)
{
printk_info("Registered flash %s\n", result);
device->next = first_flash;
first_flash = device;
}
return result ? 0 : -1;
}
return -1;
}
flash_device *find_flash_device(const char *name)
{
int len = strlen(name);
if (first_flash)
{
flash_device *flash;
for (flash = first_flash; flash; flash = flash->next)
if (strlen(flash->tag) == len && memcmp(name, flash->tag, len) == 0)
return flash;
}
printk_info ("No flash %s registered\n", name);
return 0;
}

68
src/mainboard/motorola/sandpointx3_altimus_mpc7410/init.c
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@ -1,68 +0,0 @@
/*
* Copyright (C) 2003, Greg Watson <gwatson@lanl.gov>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Do very early board initialization:
*
* - Configure External Bus (EBC)
* - Setup Flash
* - Setup NVRTC
* - Setup Board Control and Status Registers (BCSR)
* - Enable UART0 for debugging
*/
#include <ppc_asm.tmpl>
#include <ppc.h>
#include <arch/io.h>
#include <printk.h>
#include <uart8250.h>
void pnp_output(char address, char data)
{
outb(address, PNP_CFGADDR);
outb(data, PNP_CFGDATA);
}
void
board_init(void)
{
/*
* Enable UART0
*
* NOTE: this configuration assumes that the PCI/ISA IO
* address space is properly configured by default on board
* reset. While this seems to be the case with the X3, it may not
* always work.
*/
pnp_output(0x07, 6); /* LD 6 = UART0 */
pnp_output(0x30, 0); /* Dectivate */
pnp_output(0x60, TTYS0_BASE >> 8); /* IO Base */
pnp_output(0x61, TTYS0_BASE & 0xFF); /* IO Base */
pnp_output(0x30, 1); /* Activate */
uart8250_init(TTYS0_BASE, 115200/TTYS0_BAUD, TTYS0_LCS);
}
void
board_init2(void)
{
printk_info("Sandpoint initialized...\n");
}

36
src/mainboard/motorola/sandpointx3_altimus_mpc7410/nvram.h
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@ -1,36 +0,0 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/* Definitions for nvram devices - these are flash or eeprom devices used to
store information across power cycles and resets. Though they are byte
addressable, writes must be committed to allow flash devices to write
complete sectors. */
#ifndef _NVRAM_H
#define _NVRAM_H
typedef struct nvram_device
{
unsigned (*size)(struct nvram_device *data);
int (*read_block)(struct nvram_device *dev, unsigned offset,
unsigned char *data, unsigned length);
int (*write_byte)(struct nvram_device *dev, unsigned offset, unsigned char byte);
void (*commit)(struct nvram_device *data);
void *data;
} nvram_device;
int nvram_init (nvram_device *dev);
void nvram_clear(void);
extern nvram_device pcrtc_nvram;
extern void nvram_putenv(const char *name, const char *value);
extern int nvram_getenv(const char *name, char *buffer, unsigned size);
typedef const struct nvram_constant
{
const char *name;
const char *value;
} nvram_constant;
extern nvram_constant hardcoded_environment[];
#endif

2
src/mainboard/motorola/sandpointx3_altimus_mpc7410/nvram/Config.lb
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@ -1,2 +0,0 @@
object bsp_nvram.o
object nvram.o

54
src/mainboard/motorola/sandpointx3_altimus_mpc7410/nvram/bsp_nvram.c
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@ -1,54 +0,0 @@
/*
* (C) Copyright 2001
* Humboldt Solutions Ltd, adrian@humboldt.co.uk.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <arch/io.h>
#include "../nvram.h"
static unsigned bsp_size(struct nvram_device *data)
{
return 8 * 1024;
}
static int bsp_read_block(struct nvram_device *dev, unsigned offset,
unsigned char *data, unsigned length)
{
unsigned i;
for(i = 0; i < length; i++)
{
outb(((offset + i) >> 8) & 0xff, 0x74);
outb((offset + i) & 0xff, 0x75);
data[i] = inb(0x76);
}
return length;
}
static int bsp_write_byte(struct nvram_device *data, unsigned offset, unsigned char byte)
{
outb((offset >> 8) & 0xff, 0x74);
outb(offset & 0xff, 0x75);
outb(byte, 0x76);
return 1;
}
nvram_device bsp_nvram = {
bsp_size, bsp_read_block, bsp_write_byte, 0, 0
};

101
src/mainboard/motorola/sandpointx3_altimus_mpc7410/nvram/nvram.c
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/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#include <console/console.h>
#include <stdlib.h>
#include "../nvram.h"
/* NVRAM layout
*
* Environment variable record runs:
* [length]NAME=value[length]NAME=value[0]\0
* A deleted variable is:
* [length]\0AME=value
*
* When memory is full, we compact.
*
*/
static nvram_device *nvram_dev = 0;
static unsigned char *nvram_buffer = 0;
static unsigned nvram_size = 0;
static uint8_t nvram_csum = 0;
#define NVRAM_INVALID (! nvram_dev)
static void update_device(unsigned i, unsigned char data)
{
if (i < nvram_size)
{
nvram_csum -= nvram_buffer[i];
nvram_buffer[i] = data;
nvram_dev->write_byte(nvram_dev, i, data);
nvram_csum += data;
}
else
printk_info("Offset %d out of range in nvram\n", i);
}
static void update_csum(void)
{
nvram_dev->write_byte(nvram_dev, nvram_size, nvram_csum);
if (nvram_dev->commit)
nvram_dev->commit(nvram_dev);
}
static void update_string_device(unsigned i, const unsigned char *data,
unsigned len)
{
if (i + len < nvram_size)
{
unsigned j;
for(j = 0; j < len; j++)
{
nvram_csum -= nvram_buffer[i];
nvram_buffer[i] = *data;
nvram_dev->write_byte(nvram_dev, i, *data);
nvram_csum += *data;
data++;
i++;
}
}
else
printk_info("Offset %d out of range in nvram\n", i + len);
}
int nvram_init (struct nvram_device *dev)
{
nvram_dev = dev;
if (! nvram_size)
nvram_size = dev->size(dev) - 1;
printk_info("NVRAM size is %d\n", nvram_size);
if (!nvram_buffer)
{
unsigned i;
nvram_buffer = malloc (nvram_size);
if (!nvram_buffer)
return -1;
nvram_csum = 0;
dev->read_block(dev, 0, nvram_buffer, nvram_size+1);
for(i = 0; i < nvram_size; i++)
nvram_csum += nvram_buffer[i];
if (nvram_csum != nvram_buffer[nvram_size])
{
printk_info("NVRAM checksum invalid - erasing\n");
//update_device(0, 0);
//update_csum();
}
}
printk_info("Initialised nvram\n");
return 0;
}
void nvram_clear(void)
{
printk_info("Erasing NVRAM\n");
update_device(0, 0);
update_csum();
}

139
src/mainboard/motorola/sandpointx3_altimus_mpc7410/sp7410.cfg
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@ -1,139 +0,0 @@
; bdiGDB configuration file for the Sandpoint X3 evaluation system
; with the Altimus 7410 PMC
;-----------------------------------------------------------------
;
[INIT]
; init core register
WREG MSR 0x00000000 ;clear MSR
;
; init memory controller (based on DINK32)
WM32 0xFEC00000 0x46000080 ;select PCIARB
WM16 0xFEE00002 0x0080 ;
WM32 0xFEC00000 0x73000080 ;select ODCR
WM8 0xFEE00003 0xd1 ;
WM32 0xFEC00000 0x74000080 ;select CDCR
WM16 0xFEE00000 0x00fd ;
WM32 0xFEC00000 0x76000080 ;select MICR
WM8 0xFEE00002 0x40 ;
WM32 0xFEC00000 0x80000080 ;select MSAR1
WM32 0xFEE00000 0x0080a0c0 ;
WM32 0xFEC00000 0x84000080 ;select MSAR2
WM32 0xFEE00000 0xe0002040 ;
WM32 0xFEC00000 0x88000080 ;select MSAR3
WM32 0xFEE00000 0x00000000 ;
WM32 0xFEC00000 0x8c000080 ;select MSAR4
WM32 0xFEE00000 0x00010101 ;
WM32 0xFEC00000 0x90000080 ;select MEAR1
WM32 0xFEE00000 0x7f9fbfdf ;
WM32 0xFEC00000 0x94000080 ;select MEAR2
WM32 0xFEE00000 0xff1f3f5f ;
WM32 0xFEC00000 0x98000080 ;select MEAR3
WM32 0xFEE00000 0x00000000 ;
WM32 0xFEC00000 0x9c000080 ;select MEAR4
WM32 0xFEE00000 0x00010101 ;
WM32 0xFEC00000 0xa0000080 ;select MBEN
WM8 0xFEE00000 0x01 ;
WM32 0xFEC00000 0xa3000080 ;select PGMAX
WM8 0xFEE00003 0x32 ;
WM32 0xFEC00000 0xa8000080 ;select PIC1
WM32 0xFEE00000 0x981a14ff ;
WM32 0xFEC00000 0xac000080 ;select PIC2
WM32 0xFEE00000 0x00000004 ;
WM32 0xFEC00000 0xe0000080 ;select AMBOR
WM8 0xFEE00000 0xc0 ;
WM32 0xFEC00000 0xf0000080 ;select MCCR1
WM32 0xFEE00000 0xaaaae075 ;do not set MEMGO
WM32 0xFEC00000 0xf4000080 ;select MCCR2
WM32 0xFEE00000 0x2c184004 ;
WM32 0xFEC00000 0xf8000080 ;select MCCR3
WM32 0xFEE00000 0x00003078 ;
WM32 0xFEC00000 0xfc000080 ;select MCCR4
WM32 0xFEE00000 0x39223235 ;
DELAY 100
WM32 0xFEC00000 0xf0000080 ;select MCCR1
WM32 0xFEE00000 0xaaaae875 ;now set MEMGO
;
WM32 0xFEC00000 0x78000080 ;select EUMBBAR
WM32 0xFEE00000 0x000000fc ;Embedded utility memory block at 0xFC000000
;
;WM32 0xFEC00000 0xa8000080 ;select PICR1
;WM32 0xFEE00000 0x901014ff ;enable flash write (Flash on processor bus)
;
; Enable UART0
;
WM8 0xFE00015C 0x07
WM8 0xFE00015D 0x06
WM8 0xFE00015C 0x30
WM8 0xFE00015D 0x00
WM8 0xFE00015C 0x60
WM8 0xFE00015D 0x03
WM8 0xFE00015C 0x61
WM8 0xFE00015D 0xf8
WM8 0xFE00015C 0x30
WM8 0xFE00015D 0x01
;
; define maximal transfer size
;TSZ1 0xFF800000 0xFFFFFFFF ;ROM space (only for PCI boot ROM)
TSZ4 0xFF800000 0xFFFFFFFF ;ROM space (only for Local bus flash)
[TARGET]
CPUTYPE 7400 ;the CPU type (603EV,750,8240,8260,7400)
JTAGCLOCK 0 ;use 16 MHz JTAG clock
WORKSPACE 0x00000000 ;workspace in target RAM for data cache flush
BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT | GATEWAY)
BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint
;STEPMODE HWBP ;TRACE or HWBP, HWPB uses a hardware breakpoint
;VECTOR CATCH ;catch unhandled exceptions
DCACHE NOFLUSH ;data cache flushing (FLUSH | NOFLUSH)
;PARITY ON ;enable data parity generation
MEMDELAY 400 ;additional memory access delay
;REGLIST STD ;select register to transfer to GDB
;L2PM 0x00100000 0x80000 ;L2 privat memory
;SIO 2002 115200
SIO 2002 9600
;MMU XLAT
;PTBASE 0x000000f0
[HOST]
IP 10.0.1.11
;FILE E:\cygnus\root\usr\demo\sp7400\vxworks
FILE linuxbios.elf
FORMAT ELF
;START 0x403104
LOAD MANUAL ;load code MANUAL or AUTO after reset
DEBUGPORT 2001
[FLASH]
; Am29LV800BB on local processor bus (RCS0)
; set PPMC7410 switch SW2-1 OFF => ROM on Local bus
; enable flash write in PICR1 (see INIT part)
; set maximal transfer size to 4 bytes (see INIT part)
CHIPTYPE AM29BX8 ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
CHIPSIZE 0x100000 ;The size of one flash chip in bytes (e.g. Am29LV800BB = 0x100000)
BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
WORKSPACE 0x00000000 ;workspace in SDRAM
FILE linuxbios.elf
FORMAT ELF
ERASE 0xFFF00000 ;erase sector 0 of flash
ERASE 0xFFF04000 ;erase sector 1 of flash
ERASE 0xFFF06000 ;erase sector 2 of flash
ERASE 0xFFF08000 ;erase sector 3 of flash
ERASE 0xFFF10000 ;erase sector 4 of flash
ERASE 0xFFF20000 ;erase sector 5 of flash
ERASE 0xFFF30000 ;erase sector 6 of flash
ERASE 0xFFF40000 ;erase sector 7 of flash
ERASE 0xFFF50000 ;erase sector 8 of flash
ERASE 0xFFF60000 ;erase sector 9 of flash
ERASE 0xFFF70000 ;erase sector 10 of flash
[REGS]
DMM1 0xFC000000 ;Embedded utility memory base address
IMM1 0xFEC00000 0xFEE00000 ;configuration registers at byte offset 0
IMM2 0xFEC00000 0xFEE00001 ;configuration registers at byte offset 1
IMM3 0xFEC00000 0xFEE00002 ;configuration registers at byte offset 2
IMM4 0xFEC00000 0xFEE00003 ;configuration registers at byte offset 3
FILE mpc107.def