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fsp/intel common: Add support for Gfx PEIM (AKA GOP) 

This patch provides the lb_framebuffer() for coreboot table with
fsp gop usage, add Igd Opregion register defines, and update the
UPD naming following fsp.

BRANCH=none
BUG=chrome-os-partner:44559
TEST=Built and boot on kunimitsu/glados.

Change-Id: I9cf9d991eb09d698e7a78323cd855c4c99b55eca
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cd6834057cca60716bc0e24cfc2cd60fed02be7a
Original-Change-Id: I64987e393c39a7cc1084edf59e7ca51b8c5ea743
Original-Signed-off-by: robbie zhang <robbie.zhang@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/303539
Original-Commit-Ready: Robbie Zhang <robbie.zhang@intel.com>
Original-Tested-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12141
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
robbie zhang 2015-10-01 16:37:58 -07:00 committed by Patrick Georgi
parent 246115eb01
commit 32074149f7
3 changed files with 8 additions and 3 deletions
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3
src/drivers/intel/fsp1_1/fsp_gop.c
View File

@ -17,6 +17,7 @@
* Foundation, Inc.
*/
#include <boot/coreboot_tables.h>
#include <cbfs.h>
#include <console/console.h>
#include <fsp/util.h>
@ -61,7 +62,7 @@ const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len)
return vbt.data;
}
void fsp_gop_framebuffer(struct lb_header *header)
void lb_framebuffer(struct lb_header *header)
{
struct lb_framebuffer *framebuffer;
framebuffer = (struct lb_framebuffer *)lb_new_record(header);

2
src/drivers/intel/fsp1_1/include/fsp/gop.h
View File

@ -23,11 +23,9 @@
/* GOP support */
#if IS_ENABLED(CONFIG_GOP_SUPPORT)
#include <boot/coreboot_tables.h>
#include <soc/intel/common/gma.h>
const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len);
void fsp_gop_framebuffer(struct lb_header *header);
#endif /* CONFIG_GOP_SUPPORT */
#endif /* _FSP_GOP_H_ */

6
src/soc/intel/common/gma.h
View File

@ -23,6 +23,12 @@
#include <types.h>
/* IGD PCI Configuration register */
#define ASLS 0xfc /* OpRegion Base */
#define SWSCI 0xe8 /* SWSCI Register */
#define GSSCIE (1 << 0) /* SCI Event trigger */
#define SMISCISEL (1 << 15) /* Select SMI or SCI event source */
/* mailbox 0: header */
typedef struct {
u8 signature[16];