mb/google/nissa/var/pujjo: Tunning RegProxCtrl0 register for SX9324

Update SX9324 RegProxCtrl0 register settings based on tunning value
from P-sensor vendor.

BUG=b:242662878
TEST=i2cdump -y -f 13 0x28 on Pujjo

Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Change-Id: If471a6fee5a3daeac1958709415b2d5e1329b81b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
This commit is contained in:
Stanley Wu 2022-12-15 17:41:13 +08:00 committed by Martin L Roth
parent e56a812a6a
commit 3228b266b2
1 changed files with 2 additions and 2 deletions

View File

@ -410,7 +410,7 @@ chip soc/intel/alderlake
register "reg_afe_ph1" = "0x1b" register "reg_afe_ph1" = "0x1b"
register "reg_afe_ph2" = "0x1f" register "reg_afe_ph2" = "0x1f"
register "reg_afe_ph3" = "0x3d" register "reg_afe_ph3" = "0x3d"
register "reg_prox_ctrl0" = "0x0a" register "reg_prox_ctrl0" = "0x0b"
register "reg_prox_ctrl1" = "0x0a" register "reg_prox_ctrl1" = "0x0a"
register "reg_prox_ctrl2" = "0x90" register "reg_prox_ctrl2" = "0x90"
register "reg_prox_ctrl3" = "0x60" register "reg_prox_ctrl3" = "0x60"
@ -447,7 +447,7 @@ chip soc/intel/alderlake
register "ph01_resolution" = "1024" register "ph01_resolution" = "1024"
register "ph23_resolution" = "1024" register "ph23_resolution" = "1024"
register "startup_sensor" = "1" register "startup_sensor" = "1"
register "ph01_proxraw_strength" = "2" register "ph01_proxraw_strength" = "3"
register "ph23_proxraw_strength" = "2" register "ph23_proxraw_strength" = "2"
register "avg_pos_strength" = "256" register "avg_pos_strength" = "256"
register "cs_idle_sleep" = ""hi-z"" register "cs_idle_sleep" = ""hi-z""