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soc/intel/broadwell: Don't use a pointer for pei_data 

To improve the bootflow, the scope of the pei_data needs to be
extended.

Change-Id: Ic6d91692a7bf9218b81da5bb36b5b26dabac454e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32762
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Arthur Heymans 2019-05-12 15:25:54 +02:00 committed by Nico Huber
parent cadc70f797
commit 325865db56
6 changed files with 10 additions and 27 deletions
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8
src/mainboard/google/auron/romstage.c
View File

@ -29,15 +29,11 @@ __weak void variant_romstage_entry(struct romstage_params *rp)
void mainboard_romstage_entry(struct romstage_params *rp) void mainboard_romstage_entry(struct romstage_params *rp)
{ {
struct pei_data pei_data;
post_code(0x32); post_code(0x32);
/* Fill out PEI DATA */ /* Fill out PEI DATA */
memset(&pei_data, 0, sizeof(pei_data)); mainboard_fill_pei_data(&rp->pei_data);
mainboard_fill_pei_data(&pei_data); mainboard_fill_spd_data(&rp->pei_data);
mainboard_fill_spd_data(&pei_data);
rp->pei_data = &pei_data;
/* Call into the real romstage main with this board's attributes. */ /* Call into the real romstage main with this board's attributes. */
romstage_common(rp); romstage_common(rp);

8
src/mainboard/google/jecht/romstage.c
View File

@ -29,15 +29,11 @@
void mainboard_romstage_entry(struct romstage_params *rp) void mainboard_romstage_entry(struct romstage_params *rp)
{ {
struct pei_data pei_data;
post_code(0x32); post_code(0x32);
/* Fill out PEI DATA */ /* Fill out PEI DATA */
memset(&pei_data, 0, sizeof(pei_data)); mainboard_fill_pei_data(&rp->pei_data);
mainboard_fill_pei_data(&pei_data); mainboard_fill_spd_data(&rp->pei_data);
mainboard_fill_spd_data(&pei_data);
rp->pei_data = &pei_data;
/* Call into the real romstage main with this board's attributes. */ /* Call into the real romstage main with this board's attributes. */
romstage_common(rp); romstage_common(rp);

6
src/mainboard/intel/wtm2/romstage.c
View File

@ -24,14 +24,10 @@
void mainboard_romstage_entry(struct romstage_params *rp) void mainboard_romstage_entry(struct romstage_params *rp)
{ {
struct pei_data pei_data;
post_code(0x32); post_code(0x32);
/* Fill out PEI DATA */ /* Fill out PEI DATA */
memset(&pei_data, 0, sizeof(pei_data)); mainboard_fill_pei_data(&rp->pei_data);
mainboard_fill_pei_data(&pei_data);
rp->pei_data = &pei_data;
romstage_common(rp); romstage_common(rp);
} }

6
src/mainboard/purism/librem_bdw/romstage.c
View File

@ -20,12 +20,8 @@
void mainboard_romstage_entry(struct romstage_params *rp) void mainboard_romstage_entry(struct romstage_params *rp)
{ {
struct pei_data pei_data;
/* Fill out PEI DATA */ /* Fill out PEI DATA */
memset(&pei_data, 0, sizeof(pei_data)); mainboard_fill_pei_data(&rp->pei_data);
mainboard_fill_pei_data(&pei_data);
rp->pei_data = &pei_data;
/* Initialize memory */ /* Initialize memory */
romstage_common(rp); romstage_common(rp);

4
src/soc/intel/broadwell/include/soc/romstage.h
View File

@ -18,13 +18,13 @@
#include <stdint.h> #include <stdint.h>
#include <arch/cpu.h> #include <arch/cpu.h>
#include <soc/pei_data.h>
struct chipset_power_state; struct chipset_power_state;
struct pei_data;
struct romstage_params { struct romstage_params {
unsigned long bist; unsigned long bist;
struct chipset_power_state *power_state; struct chipset_power_state *power_state;
struct pei_data *pei_data; struct pei_data pei_data;
}; };
void mainboard_romstage_entry(struct romstage_params *params); void mainboard_romstage_entry(struct romstage_params *params);

5
src/soc/intel/broadwell/romstage/romstage.c
View File

@ -68,7 +68,6 @@ static void romstage_main(uint64_t tsc, uint32_t bist)
{ {
struct romstage_params rp = { struct romstage_params rp = {
.bist = bist, .bist = bist,
.pei_data = NULL,
}; };
post_code(0x30); post_code(0x30);
@ -125,7 +124,7 @@ void romstage_common(struct romstage_params *params)
timestamp_add_now(TS_BEFORE_INITRAM); timestamp_add_now(TS_BEFORE_INITRAM);
params->pei_data->boot_mode = params->power_state->prev_sleep_state; params->pei_data.boot_mode = params->power_state->prev_sleep_state;
#if CONFIG(ELOG_BOOT_COUNT) #if CONFIG(ELOG_BOOT_COUNT)
if (params->power_state->prev_sleep_state != ACPI_S3) if (params->power_state->prev_sleep_state != ACPI_S3)
@ -140,7 +139,7 @@ void romstage_common(struct romstage_params *params)
&params->power_state->hsio_checksum); &params->power_state->hsio_checksum);
/* Initialize RAM */ /* Initialize RAM */
raminit(params->pei_data); raminit(&params->pei_data);
timestamp_add_now(TS_AFTER_INITRAM); timestamp_add_now(TS_AFTER_INITRAM);