cpu/x86/msr: Move IA32_MISC_ENABLE bits to common place
Change-Id: I51aa300358013cb0e76704feb2115d2a7e260f8a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31193 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Guckian Reviewed-by: Vanny E <vanessa.f.eusebio@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -37,6 +37,8 @@
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#define IA32_PERF_CTL 0x199
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#define IA32_THERM_INTERRUPT 0x19b
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#define IA32_MISC_ENABLE 0x1a0
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#define FAST_STRINGS_ENABLE_BIT (1 << 0)
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#define SPEED_STEP_ENABLE_BIT (1 << 16)
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#define IA32_ENERGY_PERF_BIAS 0x1b0
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#define ENERGY_POLICY_PERFORMANCE 0
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#define ENERGY_POLICY_NORMAL 6
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@ -96,10 +96,6 @@
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#define SMRR_SUPPORTED (1 << 11)
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#define PRMRR_SUPPORTED (1 << 12)
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/* IA32_MISC_ENABLE bits */
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#define FAST_STRINGS_ENABLE_BIT (1 << 0)
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#define SPEED_STEP_ENABLE_BIT (1 << 16)
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/* Read BCLK from MSR */
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unsigned int bus_freq_khz(void);
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