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mb/google/hatch: Set trackpad irq and wake to GPP_A21 

Previously, We had to use GPP_A21 for trackpad wake and GPP_D21 for
trackpad interrupts due to ITSS not honoring the INVERT config.  Now
that's fixed, we can configure trackpad wake and interrupts on GPP_A21
only.

BUG=b:130436471
BRANCH=None
TEST=1. boot a hatch device and make sure we can move the cursor with the trackpad
     2. Run powerd_dbus_suspend and wake by clicking on the trackpad and ensure
        through "mosys eventlog list" that the wake source is the trackpad.\
     3. Run "echo mem > /sys/power/state", wait until device goes into S3,
        click trackpad to ensure device wakes.

Change-Id: I26a99206c42ba442f91ae577b98366fc2fd6c0ca
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
This commit is contained in:
Shelley Chen 2019-06-26 14:56:18 -07:00 committed by Furquan Shaikh
parent ad23778d23
commit 328b77a5e9
2 changed files with 5 additions and 13 deletions
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16
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -54,12 +54,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_A19, 1, DEEP), PAD_CFG_GPO(GPP_A19, 1, DEEP),
/* A20 : WLAN_INT_L */ /* A20 : WLAN_INT_L */
PAD_CFG_GPI_APIC(GPP_A20, NONE, PLTRST, LEVEL, INVERT), PAD_CFG_GPI_APIC(GPP_A20, NONE, PLTRST, LEVEL, INVERT),
/* /* A21 : TRACKPAD_INT_ODL */
* A21 : TRACKPAD_INT_ODL (wake) PAD_CFG_GPI_IRQ_WAKE(GPP_A21, NONE, DEEP, LEVEL, INVERT),
* TODO Combine into single gpio, when ITSS IPCx configuration
* is fixed in FSP.
*/
PAD_CFG_GPI_SCI(GPP_A21, NONE, DEEP, EDGE_SINGLE, INVERT),
/* A22 : FPMCU_PCH_BOOT0 */ /* A22 : FPMCU_PCH_BOOT0 */
PAD_CFG_GPO(GPP_A22, 0, DEEP), PAD_CFG_GPO(GPP_A22, 0, DEEP),
/* A23 : FPMCU_PCH_INT_ODL */ /* A23 : FPMCU_PCH_INT_ODL */
@ -209,12 +205,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
/* D20 : DMIC_DATA_0_SNDW4_DATA */ /* D20 : DMIC_DATA_0_SNDW4_DATA */
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
/* /* D21 : GPP_D21 ==> NC */
* D21 : TRACKPAD_INT_ODL PAD_NC(GPP_D21, NONE),
* TODO Combine into single gpio with invert mode, when ITSS
* IPCx configuration is fixed in FSP.
*/
PAD_CFG_GPI_APIC(GPP_D21, NONE, PLTRST, LEVEL, NONE),
/* D22 : GPP_D22 ==> NC */ /* D22 : GPP_D22 ==> NC */
PAD_NC(GPP_D22, NONE), PAD_NC(GPP_D22, NONE),
/* D23 : SPP_MCLK */ /* D23 : SPP_MCLK */

2
src/mainboard/google/hatch/variants/hatch/overridetree.cb
View File

@ -63,7 +63,7 @@ chip soc/intel/cannonlake
chip drivers/i2c/generic chip drivers/i2c/generic
register "hid" = ""ELAN0000"" register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad"" register "desc" = ""ELAN Touchpad""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)" register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A21_IRQ)"
register "wake" = "GPE0_DW0_21" register "wake" = "GPE0_DW0_21"
device i2c 15 on end device i2c 15 on end
end end