gru: Make SDRAM parameters individual struct files in CBFS

This patch changes Gru SDRAM parameters from structures that just get
compiled into the romstage to individual CBFS files. This allows us to
only load the parameter set we need for the board we're booting from
flash, which reduces our boot time and the SRAM memory footprint
required to hold the romstage.

TEST=Booted Kevin.

Change-Id: Ie88a515cbdb19a794ca0a230a56bcc82bed1e550
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16274
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/mainboard/google/gru/Makefile.inc

@@ -13,6 +13,8 @@
 ## GNU General Public License for more details.
 ##
 
+subdirs-y += sdram_params/
+
 bootblock-y += bootblock.c
 bootblock-y += chromeos.c
 bootblock-y += memlayout.ld

src/mainboard/google/gru/sdram_configs.c

@@ -15,31 +15,24 @@
 
 #include <arch/io.h>
 #include <boardid.h>
+#include <cbfs.h>
 #include <console/console.h>
 #include <gpio.h>
 #include <soc/sdram.h>
 #include <string.h>
 #include <types.h>
 
-static struct rk3399_sdram_params sdram_configs[] = {
-#include "sdram_inf/sdram-lpddr3-hynix-4GB-200.inc"
-
-/* 666MHz, enable odt 120o */
-#include "sdram_inf/sdram-lpddr3-hynix-4GB-666.inc"
-
-/* 800MHz, enable odt 120o */
-#include "sdram_inf/sdram-lpddr3-hynix-4GB-800.inc"
-
-/* 666MHz, disable odt */
-#include "sdram_inf/sdram-lpddr3-hynix-4GB-666-no-odt.inc"
-
-/* 800MHz, disable odt */
-#include "sdram_inf/sdram-lpddr3-hynix-4GB-800-no-odt.inc"
-
-/* 933MHz, enable odt 120o */
-#include "sdram_inf/sdram-lpddr3-hynix-4GB-933.inc"
+static const char *sdram_configs[] = {
+	"sdram-lpddr3-hynix-4GB-200",
+	"sdram-lpddr3-hynix-4GB-666",
+	"sdram-lpddr3-hynix-4GB-800",
+	"sdram-lpddr3-hynix-4GB-666-no-odt",
+	"sdram-lpddr3-hynix-4GB-800-no-odt",
+	"sdram-lpddr3-hynix-4GB-933",
 };
 
+static struct rk3399_sdram_params params;
+
 enum dram_speeds {
 	dram_200MHz = 0,
 	dram_666MHz = 1,
@@ -80,11 +73,8 @@ static enum dram_speeds get_sdram_index(void)
 
 const struct rk3399_sdram_params *get_sdram_config()
 {
-
-	enum dram_speeds speed = get_sdram_index();
-
-	printk(BIOS_INFO, "Using SDRAM configuration for %d MHz\n",
-	       sdram_configs[speed].ddr_freq / (1000 * 1000));
-
-	return &sdram_configs[speed];
+	if (cbfs_boot_load_struct(sdram_configs[get_sdram_index()],
+				  &params, sizeof(params)) != sizeof(params))
+		die("Cannot load SDRAM parameter file!");
+	return &params;
 }

src/mainboard/google/gru/sdram_params/Makefile.inc

@@ -0,0 +1,30 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2016 Rockchip Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+sdram-params :=
+
+sdram-params += sdram-lpddr3-hynix-4GB-200
+sdram-params += sdram-lpddr3-hynix-4GB-666
+sdram-params += sdram-lpddr3-hynix-4GB-666-no-odt
+sdram-params += sdram-lpddr3-hynix-4GB-800
+sdram-params += sdram-lpddr3-hynix-4GB-800-no-odt
+sdram-params += sdram-lpddr3-hynix-4GB-933
+
+$(foreach params,$(sdram-params), \
+	$(eval cbfs-files-y += $(params)) \
+	$(eval $(params)-file := $(params).c:struct) \
+	$(eval $(params)-type := struct) \
+	$(eval $(params)-compression := $(CBFS_COMPRESS_FLAG)) \
+)

src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-200.c

@@ -11,7 +11,9 @@
  * GNU General Public License for more details.
  */
 
-{
+#include <soc/sdram.h>
+
+struct rk3399_sdram_params params = {
 	{
 		{
 			.rank = 0x2,
@@ -1560,4 +1562,4 @@
 			0x00000000	/* DENALI_PHY_958_DATA */
 		}
 	},
-},
+};

src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666-no-odt.c

@@ -11,7 +11,9 @@
  * GNU General Public License for more details.
  */
 
-{
+#include <soc/sdram.h>
+
+struct rk3399_sdram_params params = {
 	{
 		{
 			.rank = 0x2,
@@ -1560,4 +1562,4 @@
 			0x00000000	/* DENALI_PHY_958_DATA */
 		}
 	},
-},
+};

src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666.c

@@ -11,7 +11,9 @@
  * GNU General Public License for more details.
  */
 
-{
+#include <soc/sdram.h>
+
+struct rk3399_sdram_params params = {
 	{
 		{
 			.rank = 0x2,
@@ -1560,4 +1562,4 @@
 			0x00000000	/* DENALI_PHY_958_DATA */
 		}
 	},
-},
+};

src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800-no-odt.c

@@ -11,7 +11,9 @@
  * GNU General Public License for more details.
  */
 
-{
+#include <soc/sdram.h>
+
+struct rk3399_sdram_params params = {
 	{
 		{
 			.rank = 0x2,
@@ -1560,4 +1562,4 @@
 			0x00000000	/* DENALI_PHY_958_DATA */
 		}
 	},
-},
+};

src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c

@@ -11,7 +11,9 @@
  * GNU General Public License for more details.
  */
 
-{
+#include <soc/sdram.h>
+
+struct rk3399_sdram_params params = {
 	{
 		{
 			.rank = 0x2,
@@ -1560,4 +1562,4 @@
 			0x00000000	/* DENALI_PHY_958_DATA */
 		}
 	},
-},
+};

src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-933.c

@@ -11,7 +11,9 @@
  * GNU General Public License for more details.
  */
 
-{
+#include <soc/sdram.h>
+
+struct rk3399_sdram_params params = {
 	{
 		{
 			.rank = 0x2,
@@ -1560,4 +1562,4 @@
 			0x00000000	/* DENALI_PHY_958_DATA */
 		}
 	},
-},
+};

src/soc/rockchip/rk3399/include/soc/sdram.h

@@ -16,7 +16,7 @@
 #ifndef __SOC_ROCKCHIP_RK3399_SDRAM_H__
 #define __SOC_ROCKCHIP_RK3399_SDRAM_H__
 
-#include <stddef.h>
+#include <types.h>
 
 enum {
 	DDR3 = 3,
@@ -183,8 +183,6 @@ struct rk3399_sdram_params {
 void sdram_init(const struct rk3399_sdram_params *sdram_params);
 u32 sdram_get_ram_code(void);
 const struct rk3399_sdram_params *get_sdram_config(void);
-const struct rk3399_sdram_params
-		*get_default_sdram_config(unsigned char dramtype);
 size_t sdram_size_mb(void);
 
 #endif