mb/prodrive/hermes: Use C-style comments
Most of the existing comments are C-style already. Change-Id: I9ca4779f5b0560320e9bce4f33e54766522689f9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47957 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
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@ -14,7 +14,7 @@ int check_signature(u8 addr)
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u8 blob[8] = {0};
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u8 blob[8] = {0};
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if (!read_write_config(addr, blob, EEPROM_OFFSET_FSP_SIGNATURE, 0, ARRAY_SIZE(blob))) {
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if (!read_write_config(addr, blob, EEPROM_OFFSET_FSP_SIGNATURE, 0, ARRAY_SIZE(blob))) {
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// Check Signature
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/* Check signature */
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if (*(uint64_t *)blob == FSP_UPD_SIGNATURE) {
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if (*(uint64_t *)blob == FSP_UPD_SIGNATURE) {
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printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n");
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printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n");
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return 1;
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return 1;
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@ -25,7 +25,7 @@ int check_signature(u8 addr)
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return 0;
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return 0;
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}
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}
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// Read data from offset and write it to offset in UPD
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/* Read data from offset and write it to offset in UPD */
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bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_offset,
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bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_offset,
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size_t size)
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size_t size)
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{
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{
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@ -52,7 +52,7 @@ bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_off
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if (ret < 0)
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if (ret < 0)
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break;
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break;
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// Write to UPD
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/* Write to UPD */
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uint8_t *writePointer = (uint8_t *)blob + write_offset + i;
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uint8_t *writePointer = (uint8_t *)blob + write_offset + i;
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if (size > 1 && (size % 2 == 0))
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if (size > 1 && (size % 2 == 0))
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memcpy(writePointer, tmp, 2);
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memcpy(writePointer, tmp, 2);
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@ -5,7 +5,7 @@
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#include "variants/baseboard/include/eeprom.h"
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#include "variants/baseboard/include/eeprom.h"
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static fsp_params parmas_list[] = {
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static fsp_params parmas_list[] = {
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// FIXME: Fill with additional options
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/* FIXME: Fill with additional options */
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};
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};
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void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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@ -19,7 +19,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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params->SataLedEnable = 1;
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params->SataLedEnable = 1;
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// Overwrite params
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/* Overwrite params */
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if (!check_signature(I2C_ADDR_EEPROM))
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if (!check_signature(I2C_ADDR_EEPROM))
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return;
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return;
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@ -18,7 +18,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
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memupd->FspmConfig.IedSize = 0x400000;
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memupd->FspmConfig.IedSize = 0x400000;
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cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config());
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cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config());
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// Overwrite memupd
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/* Overwrite memupd */
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if (!check_signature(I2C_ADDR_EEPROM))
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if (!check_signature(I2C_ADDR_EEPROM))
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return;
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return;
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@ -194,7 +194,7 @@ static const struct pad_config gpio_table[] = {
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/* GPP_K20 - CPU_CATERR_PCH_n */
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/* GPP_K20 - CPU_CATERR_PCH_n */
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PAD_CFG_GPI(GPP_K20, NONE, DEEP),
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PAD_CFG_GPI(GPP_K20, NONE, DEEP),
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/* GPP_K21 - TPM_INT_n */
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/* GPP_K21 - TPM_INT_n */
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PAD_CFG_GPI_INT(GPP_K21, NONE, DEEP, OFF), // Trigger?
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PAD_CFG_GPI_INT(GPP_K21, NONE, DEEP, OFF), /* Trigger? */
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/* GPP_K22 - NC */
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/* GPP_K22 - NC */
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PAD_NC(GPP_K22, NONE),
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PAD_NC(GPP_K22, NONE),
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/* GPP_K23 - NC */
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/* GPP_K23 - NC */
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@ -21,7 +21,7 @@
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#define EEPROM_OFFSET_FSP_CONFIG (EEPROM_OFFSET_FSP_SIGNATURE + sizeof(FSP_UPD_HEADER))
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#define EEPROM_OFFSET_FSP_CONFIG (EEPROM_OFFSET_FSP_SIGNATURE + sizeof(FSP_UPD_HEADER))
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#define GET_VALUE(x) {.offset = offsetof(FSP_S_CONFIG, x), \
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#define GET_VALUE(x) {.offset = offsetof(FSP_S_CONFIG, x), \
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.size = member_size(FSP_S_CONFIG, x)}
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.size = member_size(FSP_S_CONFIG, x)}
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#endif // ENV_ROMSTAGE
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#endif /* ENV_ROMSTAGE */
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typedef struct {
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typedef struct {
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size_t offset;
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size_t offset;
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