mb/prodrive/hermes: Use C-style comments

Most of the existing comments are C-style already.

Change-Id: I9ca4779f5b0560320e9bce4f33e54766522689f9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
This commit is contained in:
Angel Pons 2020-11-24 15:03:38 +01:00 committed by Patrick Georgi
parent 1e67816961
commit 329ebb340b
5 changed files with 8 additions and 8 deletions

View File

@ -14,7 +14,7 @@ int check_signature(u8 addr)
u8 blob[8] = {0}; u8 blob[8] = {0};
if (!read_write_config(addr, blob, EEPROM_OFFSET_FSP_SIGNATURE, 0, ARRAY_SIZE(blob))) { if (!read_write_config(addr, blob, EEPROM_OFFSET_FSP_SIGNATURE, 0, ARRAY_SIZE(blob))) {
// Check Signature /* Check signature */
if (*(uint64_t *)blob == FSP_UPD_SIGNATURE) { if (*(uint64_t *)blob == FSP_UPD_SIGNATURE) {
printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n"); printk(BIOS_DEBUG, "CFG EEPROM: Signature valid.\n");
return 1; return 1;
@ -25,7 +25,7 @@ int check_signature(u8 addr)
return 0; return 0;
} }
// Read data from offset and write it to offset in UPD /* Read data from offset and write it to offset in UPD */
bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_offset, bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_offset,
size_t size) size_t size)
{ {
@ -52,7 +52,7 @@ bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_off
if (ret < 0) if (ret < 0)
break; break;
// Write to UPD /* Write to UPD */
uint8_t *writePointer = (uint8_t *)blob + write_offset + i; uint8_t *writePointer = (uint8_t *)blob + write_offset + i;
if (size > 1 && (size % 2 == 0)) if (size > 1 && (size % 2 == 0))
memcpy(writePointer, tmp, 2); memcpy(writePointer, tmp, 2);

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@ -5,7 +5,7 @@
#include "variants/baseboard/include/eeprom.h" #include "variants/baseboard/include/eeprom.h"
static fsp_params parmas_list[] = { static fsp_params parmas_list[] = {
// FIXME: Fill with additional options /* FIXME: Fill with additional options */
}; };
void mainboard_silicon_init_params(FSP_S_CONFIG *params) void mainboard_silicon_init_params(FSP_S_CONFIG *params)
@ -19,7 +19,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
params->SataLedEnable = 1; params->SataLedEnable = 1;
// Overwrite params /* Overwrite params */
if (!check_signature(I2C_ADDR_EEPROM)) if (!check_signature(I2C_ADDR_EEPROM))
return; return;

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@ -18,7 +18,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
memupd->FspmConfig.IedSize = 0x400000; memupd->FspmConfig.IedSize = 0x400000;
cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config()); cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config());
// Overwrite memupd /* Overwrite memupd */
if (!check_signature(I2C_ADDR_EEPROM)) if (!check_signature(I2C_ADDR_EEPROM))
return; return;

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@ -194,7 +194,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_K20 - CPU_CATERR_PCH_n */ /* GPP_K20 - CPU_CATERR_PCH_n */
PAD_CFG_GPI(GPP_K20, NONE, DEEP), PAD_CFG_GPI(GPP_K20, NONE, DEEP),
/* GPP_K21 - TPM_INT_n */ /* GPP_K21 - TPM_INT_n */
PAD_CFG_GPI_INT(GPP_K21, NONE, DEEP, OFF), // Trigger? PAD_CFG_GPI_INT(GPP_K21, NONE, DEEP, OFF), /* Trigger? */
/* GPP_K22 - NC */ /* GPP_K22 - NC */
PAD_NC(GPP_K22, NONE), PAD_NC(GPP_K22, NONE),
/* GPP_K23 - NC */ /* GPP_K23 - NC */

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@ -21,7 +21,7 @@
#define EEPROM_OFFSET_FSP_CONFIG (EEPROM_OFFSET_FSP_SIGNATURE + sizeof(FSP_UPD_HEADER)) #define EEPROM_OFFSET_FSP_CONFIG (EEPROM_OFFSET_FSP_SIGNATURE + sizeof(FSP_UPD_HEADER))
#define GET_VALUE(x) {.offset = offsetof(FSP_S_CONFIG, x), \ #define GET_VALUE(x) {.offset = offsetof(FSP_S_CONFIG, x), \
.size = member_size(FSP_S_CONFIG, x)} .size = member_size(FSP_S_CONFIG, x)}
#endif // ENV_ROMSTAGE #endif /* ENV_ROMSTAGE */
typedef struct { typedef struct {
size_t offset; size_t offset;