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soc/intel/baytrail/northcluster.c: Rename variable 

Tested with BUILD_TIMELESS=1, Google Ninja does not change.

Change-Id: I7e74f342c0545f8d2a2128de4162581e5dc01e17
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2020-07-26 22:36:49 +02:00
parent 7bef2eeb8e
commit 32b93c94e0
1 changed files with 3 additions and 3 deletions
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6
src/soc/intel/baytrail/northcluster.c
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@ -64,7 +64,7 @@ uint32_t nc_read_top_of_low_memory(void)
static void nc_read_resources(struct device *dev)
{
unsigned long mmconf;
unsigned long bmbound;
unsigned long bmbound_k;
unsigned long bmbound_hi;
unsigned long smmrrh;
unsigned long smmrrl;
@ -98,8 +98,8 @@ static void nc_read_resources(struct device *dev)
reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);
/* All address space between bmbound and smmrrh is unusable. */
bmbound = RES_IN_KiB(nc_read_top_of_low_memory());
mmio_resource(dev, index++, smmrrh, bmbound - smmrrh);
bmbound_k = RES_IN_KiB(nc_read_top_of_low_memory());
mmio_resource(dev, index++, smmrrh, bmbound_k - smmrrh);
/* The BMBOUND_HI register matches register bits of 31:24 with address
* bits of 35:28. Therefore, shift register to align properly. */