soc/intel/baytrail/northcluster.c: Rename variable
Tested with BUILD_TIMELESS=1, Google Ninja does not change. Change-Id: I7e74f342c0545f8d2a2128de4162581e5dc01e17 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43934 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -64,7 +64,7 @@ uint32_t nc_read_top_of_low_memory(void)
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static void nc_read_resources(struct device *dev)
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static void nc_read_resources(struct device *dev)
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{
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{
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unsigned long mmconf;
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unsigned long mmconf;
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unsigned long bmbound;
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unsigned long bmbound_k;
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unsigned long bmbound_hi;
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unsigned long bmbound_hi;
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unsigned long smmrrh;
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unsigned long smmrrh;
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unsigned long smmrrl;
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unsigned long smmrrl;
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@ -98,8 +98,8 @@ static void nc_read_resources(struct device *dev)
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reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);
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reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);
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/* All address space between bmbound and smmrrh is unusable. */
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/* All address space between bmbound and smmrrh is unusable. */
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bmbound = RES_IN_KiB(nc_read_top_of_low_memory());
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bmbound_k = RES_IN_KiB(nc_read_top_of_low_memory());
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mmio_resource(dev, index++, smmrrh, bmbound - smmrrh);
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mmio_resource(dev, index++, smmrrh, bmbound_k - smmrrh);
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/* The BMBOUND_HI register matches register bits of 31:24 with address
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/* The BMBOUND_HI register matches register bits of 31:24 with address
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* bits of 35:28. Therefore, shift register to align properly. */
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* bits of 35:28. Therefore, shift register to align properly. */
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