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mb/google/volteer/var/halvor: Update USB relevant GPIO settings 

Follow HW schematic to correct DDSP_HPD1/2/3 and USB_OC3 pin.

BUG=b:165175296
BRANCH=none
TEST=Check all USB ports USB2 and USB3 both functional

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I2f941141d761b1b69bc8f9ef0b0c4516062fec4a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44651
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
This commit is contained in:
Eric Lai 2020-08-21 11:34:01 +08:00 committed by Patrick Georgi
parent 3b0d040c11
commit 32d512854a
1 changed files with 8 additions and 0 deletions
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8
src/mainboard/google/volteer/variants/halvor/gpio.c
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@ -25,8 +25,16 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
PAD_CFG_GPO(GPP_A13, 1, DEEP),
/* A14 : DDSP_HPD3 ==> USB_C2_DP_HPD */
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF2),
/* A16 : USB_OC3# ==> USB_C0_OC_OD# */
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
/* A18 : DDSP_HPDB ==> NC */
PAD_NC(GPP_A18, NONE),
/* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
/* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
/* A21 : DDPC_CTRCLK ==> EN_FP_PWR */
PAD_CFG_GPO(GPP_A21, 1, DEEP),
/* A22 : DDPC_CTRLDATA ==> NC */