AGESA fam16kb: Move NB config fam16kb out of get_bus_conf()

Change-Id: Iedb5e1c72afe70f63f39c2dbce4896863d1d275f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6357
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kyösti Mälkki 2014-07-22 19:27:52 +03:00
parent 526c2fb278
commit 32d9e9296e
3 changed files with 14 additions and 24 deletions

View File

@ -43,6 +43,20 @@ static void agesawrapper_post_device(void *unused)
/* Preparation for write_tables(). */
get_bus_conf();
#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY_16KB)
device_t dev;
u32 value;
dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */
pci_write_config32(dev, 0xF8, 0);
pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */
/* disable No Snoop */
dev = dev_find_slot(0, PCI_DEVFN(1, 1));
value = pci_read_config32(dev, 0x60);
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
#endif
#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM)
/* AMD AGESA does not enable thermal zone, so we enable it here. */
enable_imc_thermal_zone();

View File

@ -39,23 +39,9 @@ u32 apicid_yangtze;
void get_bus_conf(void)
{
u32 apicid_base;
u32 value;
device_t dev;
int i;
dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */
pci_write_config32(dev, 0xF8, 0);
pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */
/* disable No Snoop */
dev = dev_find_slot(0, PCI_DEVFN(1, 1));
value = pci_read_config32(dev, 0x60);
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
memset(bus_yangtze, 0, sizeof(bus_yangtze));

View File

@ -37,20 +37,10 @@ u32 apicid_yangtze;
void get_bus_conf(void)
{
u32 apicid_base;
u32 value;
device_t dev;
int i;
dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */
pci_write_config32(dev, 0xF8, 0);
pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */
/* disable No Snoop */
dev = dev_find_slot(0, PCI_DEVFN(1, 1));
value = pci_read_config32(dev, 0x60);
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
memset(bus_yangtze, 0, sizeof(bus_yangtze));